Mercurial > illumos > illumos-gate
changeset 10518:5e20d81ceb17
6881291 atge's PHY may not auto-nego with some switches
author | Saurabh Misra <Saurabh.Mishra@Sun.COM> |
---|---|
date | Mon, 14 Sep 2009 10:09:29 -0700 |
parents | 43ea36a8f8b6 |
children | 5d153c0fe8de |
files | usr/src/uts/common/io/atge/atge_mii.c |
diffstat | 1 files changed, 20 insertions(+), 0 deletions(-) [+] |
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--- a/usr/src/uts/common/io/atge/atge_mii.c Mon Sep 14 10:15:43 2009 -0600 +++ b/usr/src/uts/common/io/atge/atge_mii.c Mon Sep 14 10:09:29 2009 -0700 @@ -60,6 +60,18 @@ return (0xffff); } + /* + * Some fast ethernet chips may not be able to auto-nego with + * switches even though they have 1000T based PHY. Hence we mask + * 1000T based capabilities. + */ + if (atgep->atge_flags & ATGE_FLAG_FASTETHER) { + if (reg == MII_STATUS) + v &= ~MII_STATUS_EXTSTAT; + else if (reg == MII_EXTSTATUS) + v = 0; + } + return ((v & MDIO_DATA_MASK) >> MDIO_DATA_SHIFT); } @@ -109,6 +121,14 @@ GPHY_CTRL_SEL_ANA_RESET | GPHY_CTRL_PHY_PLL_ON); drv_usecwait(1000); + /* + * Some fast ethernet chips may not be able to auto-nego with + * switches even though they have 1000T based PHY. Hence we need + * to write 0 to MII_MSCONTROL control register. + */ + if (atgep->atge_flags & ATGE_FLAG_FASTETHER) + atge_mii_write(atgep, phyaddr, MII_MSCONTROL, 0x0); + /* Enable hibernation mode. */ atge_mii_write(atgep, phyaddr, ATPHY_DBG_ADDR, 0x0B); atge_mii_write(atgep, phyaddr, ATPHY_DBG_DATA, 0xBC00);