Mercurial > illumos > illumos-gate
changeset 946:5fb89afc576e
6309217 gcc and "ac" cfgadm plugin don't get along
6309344 gcc and i2c drivers don't get along
6309394 gcc and audio drivers don't get along
6309413 gcc and hpc3130_dak.c don't get along
6309459 gcc and gpio_87317 don't get along
6309470 gcc and grfans don't get along
6310438 gcc and ultrasparc drivers don't get along
6310460 gcc and sun4u pci don't get along
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--- a/usr/src/uts/common/io/audio/sada/drv/audiots/audiots.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/common/io/audio/sada/drv/audiots/audiots.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -495,7 +495,8 @@ } break; case DDI_INFO_DEVT2INSTANCE: - *result = (void *)audio_sup_devt_to_instance((dev_t)arg); + *result = + (void *)(uintptr_t)audio_sup_devt_to_instance((dev_t)arg); error = DDI_SUCCESS; break; default: @@ -510,7 +511,7 @@ * * Description: * Attach an instance of the audiots driver. This routine does the - * device dependent attach tasks. When it is complete it calls + * device dependent attach tasks. When it is complete it calls * audio_sup_register() and am_attach() so they may do their work. * * NOTE: mutex_init() no longer needs a name string, so set @@ -3631,7 +3632,8 @@ if (port & AUDIO_SPEAKER) { audiots_and_ac97(state, - AC97_MONO_MASTER_VOLUME_REGSITER, ~MMVR_MUTE); + AC97_MONO_MASTER_VOLUME_REGSITER, + (uint16_t)~MMVR_MUTE); tmp_word |= AUDIO_SPEAKER; } else { audiots_or_ac97(state, @@ -3640,7 +3642,8 @@ if (port & AUDIO_HEADPHONE) { audiots_and_ac97(state, - AC97_HEADPHONE_VOLUME_REGISTER, ~HPVR_MUTE); + AC97_HEADPHONE_VOLUME_REGISTER, + (uint16_t)~HPVR_MUTE); tmp_word |= AUDIO_HEADPHONE; } else { audiots_or_ac97(state, @@ -3649,7 +3652,7 @@ if (port & AUDIO_LINE_OUT) { audiots_and_ac97(state, AC97_MASTER_VOLUME_REGISTER, - ~MVR_MUTE); + (uint16_t)~MVR_MUTE); tmp_word |= AUDIO_LINE_OUT; } else { audiots_or_ac97(state, AC97_MASTER_VOLUME_REGISTER, @@ -3800,7 +3803,7 @@ (state->ts_shadow[TS_CODEC_REG(AC97_RECORD_GAIN_REGISTER)] & RGR_MUTE)) { audiots_and_ac97(state, AC97_RECORD_GAIN_REGISTER, - ~RGR_MUTE); + (uint16_t)~RGR_MUTE); } state->ts_input_port = port;
--- a/usr/src/uts/sun/io/audio/sada/drv/audiocs/audio_4231.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun/io/audio/sada/drv/audiocs/audio_4231.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -141,7 +141,7 @@ static void *cs_statep; /* driver name, so we don't have to call ddi_driver_name() or hard code strs */ -extern char *audiocs_name = CS4231_NAME; +static char *audiocs_name = CS4231_NAME; /* File name for the cs4231_put8() and cs4231_reg_select() routines */ static char *thisfile = __FILE__; @@ -474,7 +474,8 @@ } break; case DDI_INFO_DEVT2INSTANCE: - *result = (void *)audio_sup_devt_to_instance((dev_t)arg); + *result = (void *)(uintptr_t) + audio_sup_devt_to_instance((dev_t)arg); error = DDI_SUCCESS; break; default: @@ -2772,7 +2773,7 @@ (void) pm_idle_component(state->cs_dip, CS4231_COMPONENT); audio_sup_log(state->cs_ahandle, CE_WARN, - "!set_busy() power up failed", + "!%s%d:set_busy() power up failed", audiocs_name, state->cs_instance); mutex_enter(&state->cs_lock);
--- a/usr/src/uts/sun4u/cpu/us3_common.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/cpu/us3_common.c Fri Nov 18 15:31:22 2005 -0800 @@ -2263,8 +2263,9 @@ * to schedule the re-enabling of CEEN */ (void) timeout(cpu_delayed_check_ce_errors, - (void *)aflt->flt_inst, drv_usectohz( - (clock_t)cpu_ceen_delay_secs * MICROSEC)); + (void *)(uintptr_t)aflt->flt_inst, + drv_usectohz((clock_t)cpu_ceen_delay_secs + * MICROSEC)); } return (0); } @@ -2470,7 +2471,7 @@ */ if (ch_flt->flt_trapped_ce & CE_CEEN_DEFER) { (void) timeout(cpu_delayed_check_ce_errors, - (void *)aflt->flt_inst, + (void *)(uintptr_t)aflt->flt_inst, drv_usectohz((clock_t)cpu_ceen_delay_secs * MICROSEC)); } } @@ -5663,7 +5664,7 @@ static void cpu_check_ce_errors(void *arg) { - int cpuid = (int)arg; + int cpuid = (int)(uintptr_t)arg; cpu_t *cp; /* @@ -5725,7 +5726,8 @@ * cpu_ceen_delay_secs. */ mutex_exit(&cpu_lock); - (void) timeout(cpu_delayed_check_ce_errors, (void *)cp->cpu_id, + (void) timeout(cpu_delayed_check_ce_errors, + (void *)(uintptr_t)cp->cpu_id, drv_usectohz((clock_t)cpu_ceen_delay_secs * MICROSEC)); } }
--- a/usr/src/uts/sun4u/daktari/io/hpc3130_dak.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/daktari/io/hpc3130_dak.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -1123,7 +1123,7 @@ hpc3130_write(i2c_client_hdl_t handle, uint8_t offset, uint8_t port, uint8_t data) { - ASSERT(port >= 0 && port < HPC3130_MAX_SLOT); + ASSERT(port < HPC3130_MAX_SLOT); ASSERT(handle); return (hpc3130_rw(handle, @@ -1134,7 +1134,7 @@ hpc3130_read(i2c_client_hdl_t handle, uint8_t offset, uint8_t port, uint8_t *data) { - ASSERT(port >= 0 && port < HPC3130_MAX_SLOT); + ASSERT(port < HPC3130_MAX_SLOT); ASSERT(handle); return (hpc3130_rw(handle,
--- a/usr/src/uts/sun4u/grover/io/grfans.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/grover/io/grfans.c Fri Nov 18 15:31:22 2005 -0800 @@ -1,5 +1,5 @@ /* - * Copyright 2000-2003 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -319,7 +319,7 @@ if (unitp->oflag[channel] == FEXCL) err = EBUSY; else - unitp->oflag[channel] = FOPEN; + unitp->oflag[channel] = (uint16_t)FOPEN; } mutex_exit(&unitp->mutex);
--- a/usr/src/uts/sun4u/io/gpio_87317.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/gpio_87317.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,8 +20,8 @@ * CDDL HEADER END */ /* - * Copyright (c) 2000 by Sun Microsystems, Inc. - * All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. */ #pragma ident "%Z%%M% %I% %E% SMI" @@ -186,7 +186,7 @@ break; case DDI_INFO_DEVT2INSTANCE: - *result = (void *)instance; + *result = (void *)(uintptr_t)instance; break; default: @@ -228,23 +228,32 @@ if (ddi_regs_map_setup(dip, 0, (caddr_t *)&softc->gp_regs, 0, 0, &dev_attr, &softc->gp_handle) != DDI_SUCCESS) goto attach_failed; - DBG(dip, "attach: regs=0x%x", softc->gp_regs, 0, 0, 0, 0); + DBG(dip, "attach: regs=0x%p", (uintptr_t)softc->gp_regs, + 0, 0, 0, 0); DBG(dip, "attach: port 1 data is %x", - ddi_get8(softc->gp_handle, &softc->gp_regs[0]), 0, 0, 0, 0); + (uintptr_t)ddi_get8(softc->gp_handle, &softc->gp_regs[0]), + 0, 0, 0, 0); DBG(dip, "attach: port 1 direction is %x", - ddi_get8(softc->gp_handle, &softc->gp_regs[1]), 0, 0, 0, 0); + (uintptr_t)ddi_get8(softc->gp_handle, &softc->gp_regs[1]), + 0, 0, 0, 0); DBG(dip, "attach: port 1 output type is %x", - ddi_get8(softc->gp_handle, &softc->gp_regs[2]), 0, 0, 0, 0); + (uintptr_t)ddi_get8(softc->gp_handle, &softc->gp_regs[2]), + 0, 0, 0, 0); DBG(dip, "attach: port 1 pull up control type is %x", - ddi_get8(softc->gp_handle, &softc->gp_regs[3]), 0, 0, 0, 0); + (uintptr_t)ddi_get8(softc->gp_handle, &softc->gp_regs[3]), + 0, 0, 0, 0); DBG(dip, "attach: port 2 data is %x", - ddi_get8(softc->gp_handle, &softc->gp_regs[4]), 0, 0, 0, 0); + (uintptr_t)ddi_get8(softc->gp_handle, &softc->gp_regs[4]), + 0, 0, 0, 0); DBG(dip, "attach: port 2 direction is %x", - ddi_get8(softc->gp_handle, &softc->gp_regs[5]), 0, 0, 0, 0); + (uintptr_t)ddi_get8(softc->gp_handle, &softc->gp_regs[5]), + 0, 0, 0, 0); DBG(dip, "attach: port 2 output type is %x", - ddi_get8(softc->gp_handle, &softc->gp_regs[6]), 0, 0, 0, 0); + (uintptr_t)ddi_get8(softc->gp_handle, &softc->gp_regs[6]), + 0, 0, 0, 0); DBG(dip, "attach: port 2 pull up control type is %x", - ddi_get8(softc->gp_handle, &softc->gp_regs[7]), 0, 0, 0, 0); + (uintptr_t)ddi_get8(softc->gp_handle, &softc->gp_regs[7]), + 0, 0, 0, 0); /* Create device minor nodes. */
--- a/usr/src/uts/sun4u/io/i2c/clients/ics951601.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/ics951601.c Fri Nov 18 15:31:22 2005 -0800 @@ -209,7 +209,7 @@ err = DDI_SUCCESS; } } else if (icsp->ics951601_oflag != FEXCL) { - icsp->ics951601_oflag = FOPEN; + icsp->ics951601_oflag = (uint16_t)FOPEN; err = DDI_SUCCESS; } mutex_exit(&icsp->ics951601_mutex); @@ -363,7 +363,7 @@ return (DDI_SUCCESS); case DDI_INFO_DEVT2INSTANCE: - *result = (void *)instance; + *result = (void *)(uintptr_t)instance; return (DDI_SUCCESS); default:
--- a/usr/src/uts/sun4u/io/i2c/clients/lm75.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/lm75.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,8 +20,8 @@ * CDDL HEADER END */ /* - * Copyright (c) 2000-2001 by Sun Microsystems, Inc. - * All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. */ #pragma ident "%Z%%M% %I% %E% SMI" @@ -471,7 +471,7 @@ } (void) snprintf(unitp->lm75_name, sizeof (unitp->lm75_name), - "%sd", ddi_node_name(dip), instance); + "%s%d", ddi_node_name(dip), instance); if (ddi_create_minor_node(dip, "lm75", S_IFCHR, instance, "ddi_i2c:temperature_sensor", NULL) == DDI_FAILURE) {
--- a/usr/src/uts/sun4u/io/i2c/clients/max1617.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/max1617.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,8 +20,8 @@ * CDDL HEADER END */ /* - * Copyright (c) 1999-2001 by Sun Microsystems, Inc. - * All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. */ #pragma ident "%Z%%M% %I% %E% SMI" @@ -184,7 +184,7 @@ unitp = ddi_get_soft_state(max1617_soft_statep, instance); (void) snprintf(unitp->max1617_name, sizeof (unitp->max1617_name), - "%sd", ddi_node_name(dip), instance); + "%s%d", ddi_node_name(dip), instance); (void) sprintf(minor_name, "die_temp"); minor_number = MAX1617_INST_TO_MINOR(instance) | @@ -484,7 +484,7 @@ if (unitp->max1617_oflag == FEXCL) { err = EBUSY; } else { - unitp->max1617_oflag = FOPEN; + unitp->max1617_oflag = (uint16_t)FOPEN; } }
--- a/usr/src/uts/sun4u/io/i2c/clients/pca9556.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/pca9556.c Fri Nov 18 15:31:22 2005 -0800 @@ -391,7 +391,7 @@ *result = (void *)pcap->pca9556_dip; return (DDI_SUCCESS); case DDI_INFO_DEVT2INSTANCE: - *result = (void *)instance; + *result = (void *)(uintptr_t)instance; return (DDI_SUCCESS); default: return (DDI_FAILURE); @@ -563,7 +563,7 @@ err = DDI_SUCCESS; } } else if (pcap->pca9556_oflag != FEXCL) { - pcap->pca9556_oflag = FOPEN; + pcap->pca9556_oflag = (uint16_t)FOPEN; err = DDI_SUCCESS; } mutex_exit(&pcap->pca9556_mutex);
--- a/usr/src/uts/sun4u/io/i2c/clients/pcf8574.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/pcf8574.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,8 +20,8 @@ * CDDL HEADER END */ /* - * Copyright (c) 2000-2001 by Sun Microsystems, Inc. - * All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. */ #pragma ident "%Z%%M% %I% %E% SMI" @@ -374,7 +374,7 @@ break; } - if ((ioctl_bit.bit_num < 0) && (ioctl_bit.bit_num > 7)) { + if (ioctl_bit.bit_num > 7) { D2CMN_ERR((CE_WARN, "%s: In I2C_GET_BIT bit num" " was not between 0 and 7\n", unitp->pcf8574_name)); @@ -416,7 +416,7 @@ break; } - if ((ioctl_bit.bit_num < 0) && (ioctl_bit.bit_num > 7)) { + if (ioctl_bit.bit_num > 7) { D2CMN_ERR((CE_WARN, "%s: I2C_SET_BIT: bit_num sent" " in was not between 0 and 7", unitp->pcf8574_name)); @@ -507,7 +507,7 @@ } (void) snprintf(unitp->pcf8574_name, sizeof (unitp->pcf8574_name), - "%sd", ddi_node_name(dip), instance); + "%s%d", ddi_node_name(dip), instance); if (ddi_create_minor_node(dip, "pcf8574", S_IFCHR, instance,
--- a/usr/src/uts/sun4u/io/i2c/clients/pcf8591.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/pcf8591.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,8 +20,8 @@ * CDDL HEADER END */ /* - * Copyright (c) 2000-2001 by Sun Microsystems, Inc. - * All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. */ #pragma ident "%Z%%M% %I% %E% SMI" @@ -366,8 +366,9 @@ err = EIO; break; } else { - if (ddi_copyout((caddr_t)current_value, (caddr_t)arg, - sizeof (int32_t), mode) != DDI_SUCCESS) { + if (ddi_copyout((caddr_t)(uintptr_t)current_value, + (caddr_t)arg, sizeof (int32_t), mode) + != DDI_SUCCESS) { D2CMN_ERR((CE_WARN, "%s: Failed in " "I2C_GET_OUTPUT ddi_copyout routine\n", unitp->pcf8591_name)); @@ -477,7 +478,7 @@ } (void) snprintf(unitp->pcf8591_name, sizeof (unitp->pcf8591_name), - "%sd", ddi_node_name(dip), instance); + "%s%d", ddi_node_name(dip), instance); for (i = 0; i < 4; i++) { (void) sprintf(name, "port_%d", i);
--- a/usr/src/uts/sun4u/io/i2c/clients/seeprom.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/seeprom.c Fri Nov 18 15:31:22 2005 -0800 @@ -245,7 +245,7 @@ return (DDI_SUCCESS); case DDI_INFO_DEVT2INSTANCE: - *result = (void *)getminor((dev_t)arg); + *result = (void *)(uintptr_t)getminor((dev_t)arg); return (DDI_SUCCESS); default:
--- a/usr/src/uts/sun4u/io/i2c/clients/ssc050.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/ssc050.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,8 +20,8 @@ * CDDL HEADER END */ /* - * Copyright (c) 2001 by Sun Microsystems, Inc. - * All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Use is subject to license terms. */ #pragma ident "%Z%%M% %I% %E% SMI" @@ -478,7 +478,7 @@ break; } - if ((ioctl_bit.bit_num < 0) && (ioctl_bit.bit_num > 7)) { + if (ioctl_bit.bit_num > 7) { err = EINVAL; break; } @@ -526,7 +526,7 @@ break; } - if ((ioctl_bit.bit_num < 0) && (ioctl_bit.bit_num > 7)) { + if (ioctl_bit.bit_num > 7) { err = EINVAL; break; }
--- a/usr/src/uts/sun4u/io/i2c/clients/ssc100.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/ssc100.c Fri Nov 18 15:31:22 2005 -0800 @@ -379,7 +379,7 @@ break; } - if ((ioctl_bit.bit_num < 0) && (ioctl_bit.bit_num > 7)) { + if (ioctl_bit.bit_num > 7) { D2CMN_ERR((CE_WARN, "%s: In I2C_GET_BIT bit num" " was not between 0 and 7", unitp->ssc100_name)); @@ -418,7 +418,7 @@ break; } - if ((ioctl_bit.bit_num < 0) && (ioctl_bit.bit_num > 7)) { + if (ioctl_bit.bit_num > 7) { D2CMN_ERR((CE_WARN, "%s: I2C_SET_BIT: bit_num sent" " in was not between 0 and 7", unitp->ssc100_name));
--- a/usr/src/uts/sun4u/io/i2c/clients/tda8444.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/clients/tda8444.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -382,7 +382,7 @@ if (unitp->tda8444_oflag[channel] == FEXCL) { err = EBUSY; } else { - unitp->tda8444_oflag[channel] = FOPEN; + unitp->tda8444_oflag[channel] = (uint16_t)FOPEN; } }
--- a/usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/i2c/nexus/pcf8584.c Fri Nov 18 15:31:22 2005 -0800 @@ -746,7 +746,8 @@ return (TRAN_STATE_WR_RD); } -/*NOTREACHED*/ + /*NOTREACHED*/ + return (TRAN_STATE_NULL); } /* @@ -879,16 +880,16 @@ if (status & S1_BER) { cmn_err(CE_WARN, - "!%s bus error; Controller = 0x%x " + "!%s bus error; Controller = 0x%p " " addr = 0x%x", i2c->pcf8584_name, - (unsigned int)rp->pcf8584_regs_s1, addr); + (void *)rp->pcf8584_regs_s1, addr); pcf8584_init(i2c); return (I2C_FAILURE); } else if (status & S1_LAB) { cmn_err(CE_WARN, "!%s lost arbitration; Controller =" - " 0x%x addr = 0x%x", i2c->pcf8584_name, - (unsigned int)rp->pcf8584_regs_s1, addr); + " 0x%p addr = 0x%x", i2c->pcf8584_name, + (void *)rp->pcf8584_regs_s1, addr); pcf8584_init(i2c); return (I2C_FAILURE);
--- a/usr/src/uts/sun4u/io/mc-us3.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/mc-us3.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -293,8 +293,8 @@ goto bad2; } - DPRINTF(MC_ATTACH_DEBUG, ("mc%d: dimminfop=0x%p data=0x%llx len=%d\n", - instance, dimminfop, *dimminfop, len)); + DPRINTF(MC_ATTACH_DEBUG, ("mc%d: dimminfop=0x%p data=0x%lx len=%d\n", + instance, dimminfop, *(uint64_t *)dimminfop, len)); /* Get MC registers and construct all needed data structure */ if (mc_get_mcregs(softsp) == -1) @@ -626,7 +626,7 @@ return (EINVAL); } - DPRINTF(MC_CMD_DEBUG, ("MCIOC_BANK: bank 0x%p valid %d\n", + DPRINTF(MC_CMD_DEBUG, ("MCIOC_BANK: bank %d (0x%p) valid %hu\n", bank->bank_node.id, bank, bank->valid)); /* @@ -784,8 +784,8 @@ mccontrol->devgrpids[i].globalid = mcport->devgrpids[i]; mccontrol->devgrpids[i].localid = mcport->devgrpids[i] % NDGRPS; - DPRINTF(MC_CMD_DEBUG, ("MCIOC_CONTROL: devgrp id %d\n", - mccontrol->devgrpids[i])); + DPRINTF(MC_CMD_DEBUG, ("MCIOC_CONTROL: devgrp id %lu\n", + *(uint64_t *)&mccontrol->devgrpids[i])); } mutex_exit(&mcdatamutex); @@ -858,7 +858,7 @@ kpreempt_enable(); DPRINTF(MC_REG_DEBUG, ("get_mcregs 2: memlayoutp=0x%p madreg " - "reg=0x%llx\n", softsp->memlayoutp, madreg)); + "reg=0x%lx\n", softsp->memlayoutp, madreg)); ma_reg_array[i] = madreg; @@ -1263,7 +1263,7 @@ mcreg.madreg = reg; DPRINTF(MC_CNSTRC_DEBUG, ("mlayout_add: mc_id %d, bank num " - "%d, reg 0x%llx\n", mc_id, bank_no, reg)); + "%d, reg 0x%lx\n", mc_id, bank_no, reg)); /* add the entry on bank_info list */ idx = mc_id * NBANKS + bank_no; @@ -1306,8 +1306,8 @@ bank_curr->size = size; DPRINTF(MC_CNSTRC_DEBUG, ("mlayout_add 3: logical bank num %d, " - "lk 0x%x uk 0x%x um 0x%x ifactor 0x%x size 0x%llx base 0x%llx\n", - mcreg._s.lk, mcreg._s.uk, mcreg._s.um, ifactor, size, base)); + "lk 0x%x uk 0x%x um 0x%x ifactor 0x%x size 0x%lx base 0x%lx\n", + idx, mcreg._s.lk, mcreg._s.uk, mcreg._s.um, ifactor, size, base)); /* connect the entry and update the size on dgrp_info list */ idx = mc_id * NDGRPS + (bank_no % NDGRPS); @@ -1339,7 +1339,7 @@ dev->size += (size / NDIMMS); - DPRINTF(MC_CNSTRC_DEBUG, ("mlayout_add DIMM:id %d, size %d\n", + DPRINTF(MC_CNSTRC_DEBUG, ("mlayout_add DIMM:id %d, size %lu\n", dmidx, size)); } @@ -1527,7 +1527,7 @@ seg_ptr = (struct seg_info *)seg_head; while (seg_ptr != NULL) { - DPRINTF(MC_LIST_DEBUG, ("seg_match: base %d,given base %d\n", + DPRINTF(MC_LIST_DEBUG, ("seg_match: base %lu,given base %llu\n", seg_ptr->base, base)); if (seg_ptr->base == base) break;
--- a/usr/src/uts/sun4u/io/pci/db21554.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/db21554.c Fri Nov 18 15:31:22 2005 -0800 @@ -494,7 +494,7 @@ break; case DDI_INFO_DEVT2INSTANCE: - *result = (void *)instance; + *result = (void *)(uintptr_t)instance; rc = DDI_SUCCESS; break; @@ -2629,7 +2629,7 @@ uint32_t data; data = db_ddi_get32(handle, (uint32_t *)addr); - return (db_get_data8((uint32_t)addr, data)); + return (db_get_data8((uint32_t)(uintptr_t)addr, data)); } /* @@ -2642,7 +2642,7 @@ uint32_t data; data = db_ddi_get32(handle, (uint32_t *)addr); - return (db_get_data16((uint32_t)addr, data)); + return (db_get_data16((uint32_t)(uintptr_t)addr, data)); } /* @@ -2691,7 +2691,7 @@ wait_count = 0; } - db_put_reg_conf_addr(db_pvt, (uint32_t)addr); + db_put_reg_conf_addr(db_pvt, (uint32_t)(uintptr_t)addr); data = ddi_get32(db_pvt->handle, (uint32_t *)db_pvt->data); if (db_use_config_own_bit) { @@ -2750,7 +2750,7 @@ rdata = db_ddi_get32(handle, (uint32_t *)addr); db_ddi_put32(handle, (uint32_t *)addr, - db_put_data8((uint32_t)addr, rdata, data)); + db_put_data8((uint32_t)(uintptr_t)addr, rdata, data)); } /* @@ -2764,7 +2764,7 @@ rdata = db_ddi_get32(handle, (uint32_t *)addr); db_ddi_put32(handle, (uint32_t *)addr, - db_put_data16((uint32_t)addr, rdata, data)); + db_put_data16((uint32_t)(uintptr_t)addr, rdata, data)); } /* @@ -2813,7 +2813,7 @@ wait_count = 0; } - db_put_reg_conf_addr(db_pvt, (uint32_t)addr); + db_put_reg_conf_addr(db_pvt, (uint32_t)(uintptr_t)addr); ddi_put32(db_pvt->handle, (uint32_t *)db_pvt->data, data); if (db_use_config_own_bit) {
--- a/usr/src/uts/sun4u/io/pci/pci.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci.c Fri Nov 18 15:31:22 2005 -0800 @@ -257,7 +257,7 @@ /* non-hotplug or not attached */ switch (infocmd) { case DDI_INFO_DEVT2INSTANCE: - *result = (void *)instance; + *result = (void *)(uintptr_t)instance; return (DDI_SUCCESS); case DDI_INFO_DEVT2DEVINFO: @@ -1242,7 +1242,7 @@ * whatever alignment is passed in. */ - if ((int)arg) { + if ((uintptr_t)arg) { int val = *((int *)result); val = maxbit(val, PCI_SBUF_LINE_SIZE);
--- a/usr/src/uts/sun4u/io/pci/pci_cb.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_cb.c Fri Nov 18 15:31:22 2005 -0800 @@ -145,7 +145,7 @@ COMMON_CLEAR_INTR_REG_PENDING) && !panicstr) { if (gethrtime() - start_time > pci_intrpend_timeout) { cmn_err(CE_WARN, - "pci@%x cb_disable_nintr_reg(%p,%x) timeout", + "pci@%x cb_disable_nintr_reg(%lx,%x) timeout", cb_p->cb_pci_cmn_p->pci_common_id, map_reg_pa, CB_INO_TO_MONDO(cb_p, ino)); @@ -168,7 +168,8 @@ cb_p->cb_inos[idx] = 0; mutex_exit(&cb_p->cb_intr_lock); #ifdef _STARFIRE - pc_ittrans_cleanup(cb_p->cb_ittrans_cookie, (volatile uint64_t *)ino); + pc_ittrans_cleanup(cb_p->cb_ittrans_cookie, + (volatile uint64_t *)(uintptr_t)ino); #endif /* _STARFIRE */ }
--- a/usr/src/uts/sun4u/io/pci/pci_dma.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_dma.c Fri Nov 18 15:31:22 2005 -0800 @@ -127,7 +127,7 @@ mutex_exit(&sc_p->sc_sync_mutex); if (stack_buf[0] & PCI_SYNC_FLAG_FAILED) - cmn_err(CE_PANIC, "%p pci dma sync %llx %llx timeout!", + cmn_err(CE_PANIC, "%p pci dma sync %lx %lx timeout!", mp, sync_flag_pa, loops); } @@ -788,7 +788,7 @@ for (i = 1; i < npages; i++) { iopfn_t pfn = PCI_GET_MP_PFN1(mp, i); if (peer ^ TGT_PFN_INBETWEEN(pfn, pfn_base, pfn_last)) { - cmn_err(CE_WARN, "%s%d mixed mode DMA %x %x", + cmn_err(CE_WARN, "%s%d mixed mode DMA %lx %lx", NAMEINST(mp->dmai_rdip), MP_PFN0(mp), pfn); ret = DDI_DMA_NOMAPPING; /* mixed mode */ goto err;
--- a/usr/src/uts/sun4u/io/pci/pci_fdvma.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_fdvma.c Fri Nov 18 15:31:22 2005 -0800 @@ -66,7 +66,7 @@ int i; uint64_t tte; - offset = (uint32_t)a & IOMMU_PAGE_OFFSET; + offset = (uint32_t)(uintptr_t)a & IOMMU_PAGE_OFFSET; npages = IOMMU_BTOPR(len + offset); if (!npages) return; @@ -75,7 +75,7 @@ DEBUG3(DBG_FAST_DVMA, dip, "load index=%x: %p+%x ", index, a, len); if (index + npages > mp->dmai_ndvmapages) { cmn_err(pci_panic_on_fatal_errors ? CE_PANIC : CE_WARN, - "%s%d: kaddr_load index(%x)+pgs(%x) exceeds limit\n", + "%s%d: kaddr_load index(%x)+pgs(%lx) exceeds limit\n", ddi_driver_name(dip), ddi_get_instance(dip), index, npages); return; @@ -123,7 +123,7 @@ return; bad_pfn: cmn_err(CE_WARN, "%s%d: kaddr_load can't get page frame for vaddr %x", - ddi_driver_name(dip), ddi_get_instance(dip), (int)a); + ddi_driver_name(dip), ddi_get_instance(dip), (int)(uintptr_t)a); } /*ARGSUSED*/
--- a/usr/src/uts/sun4u/io/pci/pci_ib.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_ib.c Fri Nov 18 15:31:22 2005 -0800 @@ -207,7 +207,7 @@ IB_INO_INTR_PEND(ib_clear_intr_reg_addr(ib_p, ino)); #ifdef _STARFIRE pc_ittrans_cleanup(IB2CB(ib_p)->cb_ittrans_cookie, - (volatile uint64_t *)ino); + (volatile uint64_t *)(uintptr_t)ino); #endif /* _STARFIRE */ }
--- a/usr/src/uts/sun4u/io/pci/pci_pbm.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_pbm.c Fri Nov 18 15:31:22 2005 -0800 @@ -163,13 +163,14 @@ VERIFY(add_ivintr(mondo, pci_pil[CBNINTR_PBM], pbm_error_intr, (caddr_t)pci_p, NULL) == 0); - pbm_p->pbm_iblock_cookie = (void *)pci_pil[CBNINTR_PBM]; + pbm_p->pbm_iblock_cookie = (void *)(uintptr_t)pci_pil[CBNINTR_PBM]; /* * Create the pokefault mutex at the PIL below the error interrupt. */ mutex_init(&pbm_p->pbm_pokefault_mutex, NULL, MUTEX_DRIVER, - (void *)ipltospl(spltoipl((int)pbm_p->pbm_iblock_cookie) - 1)); + (void *)(uintptr_t)ipltospl(spltoipl( + (int)(uintptr_t)pbm_p->pbm_iblock_cookie) - 1)); if (!r) r = pci_pbm_add_intr(pci_p);
--- a/usr/src/uts/sun4u/io/pci/pci_pci.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_pci.c Fri Nov 18 15:31:22 2005 -0800 @@ -218,7 +218,7 @@ */ static void *ppb_state; -static struct ppb_cfg_state { +struct ppb_cfg_state { dev_info_t *dip; ushort_t command; uchar_t cache_line_size; @@ -309,7 +309,7 @@ static void ppb_pwr_teardown(ppb_devstate_t *ppb, dev_info_t *dip); static void ppb_init_hotplug(ppb_devstate_t *ppb); static void ppb_create_ranges_prop(dev_info_t *, ddi_acc_handle_t); -extern uint64_t pci_debug_flags = 0; +extern uint64_t pci_debug_flags; int _init(void) @@ -353,7 +353,7 @@ return (DDI_FAILURE); case DDI_INFO_DEVT2INSTANCE: - *result = (void *)instance; + *result = (void *)(uintptr_t)instance; return (DDI_SUCCESS); case DDI_INFO_DEVT2DEVINFO: @@ -1211,7 +1211,8 @@ return (PM_LEVEL_B3); } } -/*NOTREACHED*/ + /*NOTREACHED*/ + return (PM_LEVEL_B3); } /*
--- a/usr/src/uts/sun4u/io/pci/pci_pwr.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_pwr.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -70,6 +70,7 @@ ddi_node_name(dip), ddi_get_name_addr(dip)); /*NOTREACHED*/ + return (NULL); } /*
--- a/usr/src/uts/sun4u/io/pci/pci_reloc.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_reloc.c Fri Nov 18 15:31:22 2005 -0800 @@ -228,7 +228,7 @@ kvaddr, npages); if (index + npages > mp->dmai_ndvmapages) { cmn_err(pci_panic_on_fatal_errors ? CE_PANIC : CE_WARN, - "%s%d: fdvma remap index(%x)+pgs(%x) exceeds limit\n", + "%s%d: fdvma remap index(%lx)+pgs(%lx) exceeds limit\n", ddi_driver_name(dip), ddi_get_instance(dip), index, npages); return;
--- a/usr/src/uts/sun4u/io/pci/pci_util.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pci_util.c Fri Nov 18 15:31:22 2005 -0800 @@ -708,7 +708,7 @@ } if (i >= nrange) - cmn_err(CE_PANIC, "no cfg space in pci(%x) ranges prop.\n", + cmn_err(CE_PANIC, "no cfg space in pci(%p) ranges prop.\n", (void *)pci_p); return (((uint64_t)rangep->parent_high << 32) | rangep->parent_low);
--- a/usr/src/uts/sun4u/io/pci/pcisch.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/pcisch.c Fri Nov 18 15:31:22 2005 -0800 @@ -427,7 +427,7 @@ } if (flag_val && SYNC_HW_BUSY(sync_reg_pa, ino_mask) && !panicstr) - cmn_err(CE_PANIC, "%s: pbm dma sync %llx,%llx timeout!", + cmn_err(CE_PANIC, "%s: pbm dma sync %lx,%lx timeout!", pbm_p->pbm_nameaddr_str, sync_reg_pa, flag_val); done: /* optional: stdphysio(sync_reg_pa - 8, ino_mask); */ @@ -2625,8 +2625,8 @@ * Tomatillo specific registers */ if (CHIP_TYPE(pci_p) == PCI_CHIP_TOMATILLO) { - pbm_err_p->pbm_va_log = (uint64_t)va_to_pa((void *)*(a + - TOMATILLO_TGT_ERR_VALOG_OFFSET)); + pbm_err_p->pbm_va_log = (uint64_t)va_to_pa( + (void *)(uintptr_t)*(a + TOMATILLO_TGT_ERR_VALOG_OFFSET)); pbm_err_p->pbm_iommu.iommu_tfar = *iommu_p->iommu_tfar_reg; } @@ -2955,15 +2955,15 @@ continue; cmn_err(CE_CONT, "%s%d: Error %x on IOMMU TLB entry %x:\n" - "\tContext=%x %sWritable %sStreamable\n" - "\tPCI Page Size=%sk Address in page %x\n", + "\tContext=%lx %sWritable %sStreamable\n" + "\tPCI Page Size=%sk Address in page %lx\n", ddi_driver_name(dip), ddi_get_instance(dip), errstat, i, (tag & TLBTAG_CONTEXT_BITS) >> TLBTAG_CONTEXT_SHIFT, (tag & TLBTAG_WRITABLE_BIT) ? "" : neg, (tag & TLBTAG_STREAM_BIT) ? "" : neg, (tag & TLBTAG_PGSIZE_BIT) ? "64" : "8", (tag & TLBTAG_PCIVPN_BITS) << 13); - cmn_err(CE_CONT, "Memory: %sValid %sCacheable Page Frame=%x\n", + cmn_err(CE_CONT, "Memory: %sValid %sCacheable Page Frame=%lx\n", (data & TLBDATA_VALID_BIT) ? "" : neg, (data & TLBDATA_CACHE_BIT) ? "" : neg, pfn); } @@ -2990,7 +2990,7 @@ ctl_old = *iommu_p->iommu_ctrl_reg; /* iommu ctrl reg error bits are W1C */ if (ctl_old >> TOMATIILO_IOMMU_ERR_REG_SHIFT) { - cmn_err(CE_WARN, "Tomatillo iommu err: %x", ctl_old); + cmn_err(CE_WARN, "Tomatillo iommu err: %lx", ctl_old); *ctl_p |= (ctl_old >> TOMATIILO_IOMMU_ERR_REG_SHIFT) << TOMATIILO_IOMMU_ERR_REG_SHIFT; } @@ -3462,7 +3462,7 @@ ctrl_reg = *ctrl_reg_p; if ((ctrl_reg & (SCHIZO_PCI_CTRL_ARB_EN_MASK | SCHIZO_PCI_CTRL_ARB_PARK)) != 0) - panic("ctrl_reg didn't quiesce: 0x%x\n", ctrl_reg); + panic("ctrl_reg didn't quiesce: 0x%lx\n", ctrl_reg); #endif if (pbm_p->pbm_anychild_cfgpa) (void) ldphysio(pbm_p->pbm_anychild_cfgpa); @@ -3497,7 +3497,7 @@ ctrl_reg = *ctrl_reg_p; if ((ctrl_reg & (SCHIZO_PCI_CTRL_ARB_EN_MASK | SCHIZO_PCI_CTRL_ARB_PARK)) == 0) - panic("ctrl_reg didn't unquiesce: 0x%x\n", ctrl_reg); + panic("ctrl_reg didn't unquiesce: 0x%lx\n", ctrl_reg); #endif }
--- a/usr/src/uts/sun4u/io/pci/simba.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pci/simba.c Fri Nov 18 15:31:22 2005 -0800 @@ -215,7 +215,7 @@ /* * Simba specific error state structure */ -static struct simba_errstate { +struct simba_errstate { char *error; ushort_t pci_cfg_stat; ushort_t pci_cfg_sec_stat; @@ -224,7 +224,7 @@ int bridge_secondary; }; -static struct simba_cfg_state { +struct simba_cfg_state { dev_info_t *dip; ushort_t command; uchar_t cache_line_size; @@ -349,7 +349,7 @@ return (DDI_FAILURE); case DDI_INFO_DEVT2INSTANCE: - *result = (void *)instance; + *result = (void *)(uintptr_t)instance; return (DDI_SUCCESS); case DDI_INFO_DEVT2DEVINFO: @@ -379,7 +379,7 @@ switch (cmd) { case DDI_ATTACH: - DEBUG1(D_ATTACH, "attach(%x) ATTACH\n", (int)devi); + DEBUG1(D_ATTACH, "attach(%p) ATTACH\n", devi); /* * Make sure the "device_type" property exists. @@ -514,8 +514,8 @@ { register dev_info_t *pdip; - DEBUG3(D_MAP, "simba_bus_map(): dip=%x, rdip=%x, mp=%x", dip, rdip, mp); - DEBUG3(D_MAP, "simba_bus_map(): offset=%x, len=%x, vaddrp=%x", + DEBUG3(D_MAP, "simba_bus_map(): dip=%p, rdip=%p, mp=%p", dip, rdip, mp); + DEBUG3(D_MAP, "simba_bus_map(): offset=%lx, len=%lx, vaddrp=%p", offset, len, vaddrp); pdip = (dev_info_t *)DEVI(dip)->devi_parent; @@ -597,7 +597,7 @@ pci_regspec_t *drv_regp; DEBUG6(D_CTLOPS, - "simba_ctlops(): dip=%x rdip=%x ctlop=%x-%s arg=%x result=%x", + "simba_ctlops(): dip=%p rdip=%p ctlop=%x-%s arg=%p result=%p", dip, rdip, ctlop, ctlop < (sizeof (ops) / sizeof (ops[0])) ? ops[ctlop] : "Unknown", arg, result); @@ -652,7 +652,7 @@ } kmem_free(drv_regp, reglen); - DEBUG1(D_CTLOPS, "simba_ctlops(): *result=%x\n", *(off_t *)result); + DEBUG1(D_CTLOPS, "simba_ctlops(): *result=%lx\n", *(off_t *)result); return (DDI_SUCCESS); } @@ -715,7 +715,7 @@ simba_devstate_t *simba; uint_t n; - DEBUG1(D_INIT_CLD, "simba_initchild(): child=%x\n", child); + DEBUG1(D_INIT_CLD, "simba_initchild(): child=%p\n", child); /* * Pseudo nodes indicate a prototype node with per-instance @@ -938,7 +938,7 @@ continue; } - DEBUG3(D_DETACH, "%s%d: saving child dip=%x\n", + DEBUG3(D_DETACH, "%s%d: saving child dip=%p\n", ddi_driver_name(simba_p->dip), ddi_get_instance(simba_p->dip), dip); @@ -1008,7 +1008,7 @@ continue; } - DEBUG5(D_ATTACH, "%s%d: restoring regs for %x-%s%d\n", + DEBUG5(D_ATTACH, "%s%d: restoring regs for %p-%s%d\n", ddi_driver_name(simba_p->dip), ddi_get_instance(simba_p->dip), dip,
--- a/usr/src/uts/sun4u/io/pmubus.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/pmubus.c Fri Nov 18 15:31:22 2005 -0800 @@ -412,8 +412,8 @@ /* gets are simple, we just issue them no locking necessary */ value = pci_config_get8(softsp->pmubus_reghdl, offset) & mask; - DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_get8: addr=%p offset=%x value=%x " - "mask=%lx\n", addr, offset, value, mask)); + DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_get8: addr=%p offset=%lx value=%x " + "mask=%x\n", addr, offset, value, mask)); return (value); } @@ -455,8 +455,8 @@ /* gets are simple, we just issue them no locking necessary */ value = pci_config_get32(softsp->pmubus_reghdl, offset) & mask; - DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_get32: addr=%p offset=%x value=%x " - "mask=%lx\n", addr, offset, value, mask)); + DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_get32: addr=%p offset=%lx value=%x " + "mask=%x\n", addr, offset, value, mask)); return (value); } @@ -485,7 +485,7 @@ /* * Process "bit lane" register */ - DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_put8: addr=%p offset=%x " + DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_put8: addr=%p offset=%lx " "value=%x mask=%lx\n", addr, offset, value, pmubus_mapreqp->mapreq_mask)); @@ -507,7 +507,7 @@ /* * Process shared register */ - DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_put8: addr=%p offset=%x " + DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_put8: addr=%p offset=%lx " "value=%x\n", addr, offset, value)); pci_config_put8(softsp->pmubus_reghdl, offset, value); } @@ -539,7 +539,7 @@ /* * Process "bit lane" register */ - DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_put32: addr=%p offset=%x " + DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_put32: addr=%p offset=%lx " "value=%x mask=%lx\n", addr, offset, value, pmubus_mapreqp->mapreq_mask)); @@ -561,7 +561,7 @@ /* * Process shared register */ - DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_put32: addr=%p offset=%x " + DPRINTF(PMUBUS_RW_DEBUG, ("pmubus_put32: addr=%p offset=%lx " "value=%x\n", addr, offset, value)); pci_config_put32(softsp->pmubus_reghdl, offset, value); } @@ -672,7 +672,7 @@ /* * Handle the mapping according to its type. */ - DPRINTF(PMUBUS_MAP_DEBUG, ("rdip=%s%d: off=%x len=%x\n", + DPRINTF(PMUBUS_MAP_DEBUG, ("rdip=%s%d: off=%lx len=%lx\n", ddi_get_name(rdip), ddi_get_instance(rdip), off, len)); switch (mp->map_type) { case DDI_MT_RNUMBER: { @@ -684,7 +684,7 @@ */ rnumber = mp->map_obj.rnumber; DPRINTF(PMUBUS_MAP_DEBUG, ("rdip=%s%d: rnumber=%x " - "handlep=%x\n", ddi_get_name(rdip), ddi_get_instance(rdip), + "handlep=%p\n", ddi_get_name(rdip), ddi_get_instance(rdip), rnumber, mp->map_handlep)); if (ddi_getlongprop(DDI_DEV_T_ANY, rdip, DDI_PROP_DONTPASS, @@ -778,7 +778,7 @@ pmubus_mask(pmubus_regs, rnumber, pmubus_regmask); DPRINTF(PMUBUS_MAP_DEBUG, ("rnumber=%d " - "mask=%llx\n", rnumber, + "mask=%lx\n", rnumber, pmubus_mapreqp->mapreq_mask)); if (pmubus_mapreqp->mapreq_mask == 0) { kmem_free(pmubus_mapreqp,
--- a/usr/src/uts/sun4u/io/us_drv.c Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/io/us_drv.c Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 2004 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -978,7 +978,7 @@ */ if (lbolt_cnt > cur_spd->quant_cnt) { DPRINTF(D_PM_MONITOR_DELAY, ("us_pm_monitor: instance %d: " - "lbolt count %d > quantum_count %d\n", + "lbolt count %ld > quantum_count %u\n", ddi_get_instance(dip), lbolt_cnt, cur_spd->quant_cnt)); } #endif /* DEBUG */
--- a/usr/src/uts/sun4u/sys/i2c/clients/adm1031_impl.h Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/sys/i2c/clients/adm1031_impl.h Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 1999-2002 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -101,7 +101,7 @@ * Maximum speed for a fan is 0xf(100% PWM duty cycle) and minimum is * 0x0(0% PWM duty cycle). */ -#define ADM1031_CHECK_INVALID_SPEED(x) ((x < 0x00) || (x > 0x0F)) +#define ADM1031_CHECK_INVALID_SPEED(x) ((x) > 0x0F) /* * Check if the minor node corresponds with the correct function.
--- a/usr/src/uts/sun4u/sys/pci/pci_dma.h Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/sys/pci/pci_dma.h Fri Nov 18 15:31:22 2005 -0800 @@ -257,7 +257,8 @@ #define PCI_GET_MP_PFN1_ADDR(mp) (((iopfn_t *)(mp)->dmai_pfnlst) + 1) #define PCI_GET_MP_TTE(tte) \ - (((uint64_t)(tte) >> 5) << (32 + 5) | ((uint32_t)(tte)) & 0x12) + (((uint64_t)(uintptr_t)(tte) >> 5) << (32 + 5) | \ + ((uint32_t)(uintptr_t)(tte)) & 0x12) #define PCI_SAVE_MP_TTE(mp, tte) \ (mp)->dmai_tte = (caddr_t)(HI32(tte) | ((tte) & 0x12))
--- a/usr/src/uts/sun4u/sys/pci/pci_ib.h Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/sys/pci/pci_ib.h Fri Nov 18 15:31:22 2005 -0800 @@ -174,7 +174,8 @@ * return the 1st ino of the 4 that are sharing the same mapping register. */ #define IB_GET_MAPREG_INO(ino) \ - ((volatile uint64_t *)((ino & 0x20) ? ino : ((ino >> 2) << 2))) + ((volatile uint64_t *)(uintptr_t)((ino & 0x20) ? \ + ino : ((ino >> 2) << 2))) #endif /* _STARFIRE */ #define IB_IGN_TO_MONDO(ign, ino) (((ign) << PCI_INO_BITS) | (ino))
--- a/usr/src/uts/sun4u/sys/pci/pci_iommu.h Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/sys/pci/pci_iommu.h Fri Nov 18 15:31:22 2005 -0800 @@ -216,7 +216,7 @@ #define IOMMU_CTX2TTE(ctx) (((uint64_t)(ctx)) << IOMMU_TTE_CTX_SHIFT) #define IOMMU_TTE2CTX(tte) \ (((tte) >> (IOMMU_TTE_CTX_SHIFT - 32)) & IOMMU_CTX_MASK) -#define MP2CTX(mp) IOMMU_TTE2CTX((uint32_t)(mp)->dmai_tte) +#define MP2CTX(mp) IOMMU_TTE2CTX((uint32_t)(uintptr_t)(mp)->dmai_tte) /* dvma debug */ #define DVMA_DBG_ON(iommu_p) \
--- a/usr/src/uts/sun4u/sys/upa64s.h Fri Nov 18 13:17:05 2005 -0800 +++ b/usr/src/uts/sun4u/sys/upa64s.h Fri Nov 18 15:31:22 2005 -0800 @@ -20,7 +20,7 @@ * CDDL HEADER END */ /* - * Copyright 1999-2002 Sun Microsystems, Inc. All rights reserved. + * Copyright 2005 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -34,7 +34,7 @@ #endif #define HI32(x) ((uint32_t)(((uint64_t)(x)) >> 32)) -#define LO32(x) ((uint32_t)(x)) +#define LO32(x) ((uint32_t)(uintptr_t)(x)) #define UPA64S_PORTS 2 /* number of UPA ports per device */ /*