Mercurial > illumos > illumos-gate
changeset 4039:8a5733b96af9
6450287 6267828 fixes just UE errors and not CE errors.
author | kd93003 |
---|---|
date | Mon, 16 Apr 2007 09:34:42 -0700 |
parents | 7187705e6a23 |
children | ab47869b3932 |
files | usr/src/uts/sun4u/io/pci/pci_ecc.c usr/src/uts/sun4u/io/pci/pcipsy.c usr/src/uts/sun4u/io/pci/pcisch.c usr/src/uts/sun4u/sys/pci/pci_regs.h |
diffstat | 4 files changed, 57 insertions(+), 50 deletions(-) [+] |
line wrap: on
line diff
--- a/usr/src/uts/sun4u/io/pci/pci_ecc.c Mon Apr 16 06:16:31 2007 -0700 +++ b/usr/src/uts/sun4u/io/pci/pci_ecc.c Mon Apr 16 09:34:42 2007 -0700 @@ -2,9 +2,8 @@ * CDDL HEADER START * * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. + * Common Development and Distribution License (the "License"). + * You may not use this file except in compliance with the License. * * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE * or http://www.opensolaris.org/os/licensing. @@ -20,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2005 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -416,6 +415,13 @@ cb_t *cb_p; int fatal = 0; int nonfatal = 0; + ecc_errstate_t ecc_sec_err; + uint64_t sec_tmp; + int i; + uint64_t afsr_err[] = { COMMON_ECC_AFSR_E_PIO, + COMMON_ECC_AFSR_E_DRD, + COMMON_ECC_AFSR_E_DWR }; + ASSERT(MUTEX_HELD(&ecc_p->ecc_pci_cmn_p->pci_fm_mutex)); @@ -444,17 +450,10 @@ ecc_err_p->ecc_aflt.flt_panic); } if (sec_err) { - ecc_errstate_t ecc_sec_err; - uint64_t sec_tmp; - int i; - uint64_t afsr_err[] = {COMMON_ECC_UE_AFSR_E_PIO, - COMMON_ECC_UE_AFSR_E_DRD, - COMMON_ECC_UE_AFSR_E_DWR}; - ecc_sec_err = *ecc_err_p; ecc_sec_err.ecc_pri = 0; /* - * Secondary errors are cummulative so we need to loop + * Secondary errors are cumulative so we need to loop * through to capture them all. */ for (i = 0; i < 3; i++) { @@ -500,12 +499,20 @@ nonfatal++; } if (sec_err) { - ecc_errstate_t ecc_sec_err; - ecc_sec_err = *ecc_err_p; ecc_sec_err.ecc_pri = 0; - pci_ecc_classify(sec_err, &ecc_sec_err); - ecc_ereport_post(pci_p->pci_dip, &ecc_sec_err); + /* + * Secondary errors are cumulative so we need to loop + * through to capture them all. + */ + for (i = 0; i < 3; i++) { + sec_tmp = sec_err & afsr_err[i]; + if (sec_tmp) { + pci_ecc_classify(sec_tmp, &ecc_sec_err); + ecc_ereport_post(pci_p->pci_dip, + &ecc_sec_err); + } + } nonfatal++; } break;
--- a/usr/src/uts/sun4u/io/pci/pcipsy.c Mon Apr 16 06:16:31 2007 -0700 +++ b/usr/src/uts/sun4u/io/pci/pcipsy.c Mon Apr 16 09:34:42 2007 -0700 @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -1608,7 +1608,7 @@ /* * Determine the primary error type. */ - if (err & COMMON_ECC_UE_AFSR_E_PIO) { + if (err & COMMON_ECC_AFSR_E_PIO) { if (ecc_err_p->ecc_ii_p.ecc_type == CBNINTR_UE) { if (ecc_err_p->ecc_pri) { ecc->flt_erpt_class = PCI_ECC_PIO_UE; @@ -1621,7 +1621,7 @@ PCI_ECC_PIO_CE : PCI_ECC_SEC_PIO_CE; return; } - } else if (err & COMMON_ECC_UE_AFSR_E_DRD) { + } else if (err & COMMON_ECC_AFSR_E_DRD) { if (ecc_err_p->ecc_ii_p.ecc_type == CBNINTR_UE) { if (ecc_err_p->ecc_pri) { ecc->flt_erpt_class = PCI_ECC_DRD_UE; @@ -1634,7 +1634,7 @@ PCI_ECC_DRD_CE : PCI_ECC_SEC_DRD_CE; return; } - } else if (err & COMMON_ECC_UE_AFSR_E_DWR) { + } else if (err & COMMON_ECC_AFSR_E_DWR) { if (ecc_err_p->ecc_ii_p.ecc_type == CBNINTR_UE) { if (ecc_err_p->ecc_pri) { ecc->flt_erpt_class = PCI_ECC_DWR_UE;
--- a/usr/src/uts/sun4u/io/pci/pcisch.c Mon Apr 16 06:16:31 2007 -0700 +++ b/usr/src/uts/sun4u/io/pci/pcisch.c Mon Apr 16 09:34:42 2007 -0700 @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -1758,69 +1758,69 @@ } static ecc_fm_err_t ecc_err_tbl[] = { - PCI_ECC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_PRIMARY, SCHIZO_ECC_AFAR_PIOW_UPA64S, SCH_REG_UPA, ACC_HANDLE, - PCI_ECC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_PRIMARY, SCHIZO_ECC_AFAR_PIOW_PCIA_REG, SCH_REG_PCIA_REG, ACC_HANDLE, - PCI_ECC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_PRIMARY, SCHIZO_ECC_AFAR_PIOW_PCIA_MEM, SCH_REG_PCIA_MEM, ACC_HANDLE, - PCI_ECC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_PRIMARY, SCHIZO_ECC_AFAR_PIOW_PCIA_CFGIO, SCH_REG_PCIA_CFGIO, ACC_HANDLE, - PCI_ECC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_PRIMARY, SCHIZO_ECC_AFAR_PIOW_PCIB_REG, SCH_REG_PCIB_REG, ACC_HANDLE, - PCI_ECC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_PRIMARY, SCHIZO_ECC_AFAR_PIOW_PCIB_MEM, SCH_REG_PCIB_MEM, ACC_HANDLE, - PCI_ECC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_PRIMARY, SCHIZO_ECC_AFAR_PIOW_PCIB_CFGIO, SCH_REG_PCIB_CFGIO, ACC_HANDLE, - PCI_ECC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_PRIMARY, SCHIZO_ECC_AFAR_PIOW_SAFARI_REGS, SCH_REG_SAFARI_REGS, ACC_HANDLE, - PCI_ECC_SEC_PIO_UE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_UE, + PCI_ECC_SEC_PIO_UE, COMMON_ECC_AFSR_E_PIO, CBNINTR_UE, PBM_SECONDARY, NULL, NULL, ACC_HANDLE, - PCI_ECC_PIO_CE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_CE, + PCI_ECC_PIO_CE, COMMON_ECC_AFSR_E_PIO, CBNINTR_CE, PBM_PRIMARY, NULL, NULL, ACC_HANDLE, - PCI_ECC_SEC_PIO_CE, COMMON_ECC_UE_AFSR_E_PIO, CBNINTR_CE, + PCI_ECC_SEC_PIO_CE, COMMON_ECC_AFSR_E_PIO, CBNINTR_CE, PBM_SECONDARY, NULL, NULL, ACC_HANDLE, - PCI_ECC_DRD_UE, COMMON_ECC_UE_AFSR_E_DRD, CBNINTR_UE, + PCI_ECC_DRD_UE, COMMON_ECC_AFSR_E_DRD, CBNINTR_UE, PBM_PRIMARY, NULL, NULL, DMA_HANDLE, - PCI_ECC_SEC_DRD_UE, COMMON_ECC_UE_AFSR_E_DRD, CBNINTR_UE, + PCI_ECC_SEC_DRD_UE, COMMON_ECC_AFSR_E_DRD, CBNINTR_UE, PBM_SECONDARY, NULL, NULL, DMA_HANDLE, - PCI_ECC_DRD_CE, COMMON_ECC_UE_AFSR_E_DRD, CBNINTR_CE, + PCI_ECC_DRD_CE, COMMON_ECC_AFSR_E_DRD, CBNINTR_CE, PBM_PRIMARY, NULL, NULL, DMA_HANDLE, - PCI_ECC_SEC_DRD_CE, COMMON_ECC_UE_AFSR_E_DRD, CBNINTR_CE, + PCI_ECC_SEC_DRD_CE, COMMON_ECC_AFSR_E_DRD, CBNINTR_CE, PBM_SECONDARY, NULL, NULL, DMA_HANDLE, - PCI_ECC_DWR_UE, COMMON_ECC_UE_AFSR_E_DWR, CBNINTR_UE, + PCI_ECC_DWR_UE, COMMON_ECC_AFSR_E_DWR, CBNINTR_UE, PBM_PRIMARY, NULL, NULL, DMA_HANDLE, - PCI_ECC_SEC_DWR_UE, COMMON_ECC_UE_AFSR_E_DWR, CBNINTR_UE, + PCI_ECC_SEC_DWR_UE, COMMON_ECC_AFSR_E_DWR, CBNINTR_UE, PBM_SECONDARY, NULL, NULL, DMA_HANDLE, - PCI_ECC_DWR_CE, COMMON_ECC_UE_AFSR_E_DWR, CBNINTR_CE, + PCI_ECC_DWR_CE, COMMON_ECC_AFSR_E_DWR, CBNINTR_CE, PBM_PRIMARY, NULL, NULL, DMA_HANDLE, - PCI_ECC_SEC_DWR_CE, COMMON_ECC_UE_AFSR_E_DWR, CBNINTR_CE, + PCI_ECC_SEC_DWR_CE, COMMON_ECC_AFSR_E_DWR, CBNINTR_CE, PBM_SECONDARY, NULL, NULL, DMA_HANDLE, NULL, NULL, NULL, NULL, NULL, NULL,
--- a/usr/src/uts/sun4u/sys/pci/pci_regs.h Mon Apr 16 06:16:31 2007 -0700 +++ b/usr/src/uts/sun4u/sys/pci/pci_regs.h Mon Apr 16 09:34:42 2007 -0700 @@ -2,9 +2,8 @@ * CDDL HEADER START * * The contents of this file are subject to the terms of the - * Common Development and Distribution License, Version 1.0 only - * (the "License"). You may not use this file except in compliance - * with the License. + * Common Development and Distribution License (the "License"). + * You may not use this file except in compliance with the License. * * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE * or http://www.opensolaris.org/os/licensing. @@ -20,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 1991-2002 Sun Microsystems, Inc. All rights reserved. + * Copyright 2007 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -113,9 +112,6 @@ #define COMMON_ECC_UE_AFSR_PE_SHIFT 61 #define COMMON_ECC_UE_AFSR_SE_SHIFT 58 #define COMMON_ECC_UE_AFSR_E_MASK 0x0000000000000007ull -#define COMMON_ECC_UE_AFSR_E_PIO 0x0000000000000004ull -#define COMMON_ECC_UE_AFSR_E_DRD 0x0000000000000002ull -#define COMMON_ECC_UE_AFSR_E_DWR 0x0000000000000001ull /* * psycho and schizo ECC CE AFSR bit definitions: @@ -123,9 +119,13 @@ #define COMMON_ECC_CE_AFSR_PE_SHIFT 61 #define COMMON_ECC_CE_AFSR_SE_SHIFT 58 #define COMMON_ECC_CE_AFSR_E_MASK 0x0000000000000007ull -#define COMMON_ECC_CE_AFSR_E_PIO 0x0000000000000004ull -#define COMMON_ECC_CE_AFSR_E_DRD 0x0000000000000002ull -#define COMMON_ECC_CE_AFSR_E_DWR 0x0000000000000001ull + +/* + * psycho and schizo ECC CE/UE AFSR bit definitions for error types: + */ +#define COMMON_ECC_AFSR_E_PIO 0x0000000000000004ull +#define COMMON_ECC_AFSR_E_DRD 0x0000000000000002ull +#define COMMON_ECC_AFSR_E_DWR 0x0000000000000001ull /* * psycho and schizo pci control register bits: