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changeset 10668:e0d0c98c8bae

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6872640 intel_nb5000 chipset driver puts unused bit 22 into the mcerr_fbd register 6877601 supermicro X7DCL-i with chipset 5100 panic at boot time
author Vuong Nguyen <Vuong.Nguyen@Sun.COM>
date Mon, 28 Sep 2009 13:33:49 -0400
parents bc413e63c72c
children ccf9f7e81ff9
files usr/src/uts/intel/io/intel_nb5000/nb5000.h usr/src/uts/intel/io/intel_nb5000/nb5000_init.c
diffstat 2 files changed, 42 insertions(+), 13 deletions(-) [+]
line wrap: on
line diff
--- a/usr/src/uts/intel/io/intel_nb5000/nb5000.h	Mon Sep 28 16:13:05 2009 +0100
+++ b/usr/src/uts/intel/io/intel_nb5000/nb5000.h	Mon Sep 28 13:33:49 2009 -0400
@@ -319,7 +319,7 @@
 #define	EMASK_5000_FBD_RES	(EMASK_FBD_M24|EMASK_FBD_M16)
 #define	EMASK_FBD_RES	(nb_chipset == INTEL_NB_5400 ? 0 : EMASK_5000_FBD_RES)
 
-#define	EMASK_FBD_FATAL	(EMASK_FBD_M23|EMASK_FBD_M3|EMASK_FBD_M2|EMASK_FBD_M1)
+#define	EMASK_FBD_FATAL	(EMASK_FBD_M3|EMASK_FBD_M2|EMASK_FBD_M1)
 #define	EMASK_FBD_NF (EMASK_FBD_M28|EMASK_FBD_M27|EMASK_FBD_M26|EMASK_FBD_M25| \
 	EMASK_FBD_M22|EMASK_FBD_M21|EMASK_FBD_M20|EMASK_FBD_M19|EMASK_FBD_M18| \
 	EMASK_FBD_M17|EMASK_FBD_M15|EMASK_FBD_M14|EMASK_FBD_M13|EMASK_FBD_M12| \
@@ -332,6 +332,9 @@
 	EMASK_FBD_M15|EMASK_FBD_M14|EMASK_FBD_M13|EMASK_FBD_M12| \
 	EMASK_FBD_M11|EMASK_FBD_M10|EMASK_FBD_M9|EMASK_FBD_M8|EMASK_FBD_M7| \
 	EMASK_FBD_M6|EMASK_FBD_M5|EMASK_FBD_M4)
+#define	EMASK_7300_FBD_FATAL	(EMASK_FBD_M23|EMASK_FBD_M3|EMASK_FBD_M2| \
+	EMASK_FBD_M1)
+#define	EMASK_7300_FBD_NF	EMASK_FBD_NF
 
 /* FERR_NF_MEM: MC First non-fatal errors */
 #define	ERR_MEM_CH_SHIFT	28	/* channel index in nf_mem */
@@ -429,8 +432,10 @@
 #define	EMASK_INT_B2	0x02	/* B2Msk Multi-tag hit SF */
 #define	EMASK_INT_B1	0x01	/* B1Msk DM parity error */
 
-/* MCH 5000 errata 2 */
+/* MCH 5000 errata 2: disable B1 */
 #define	EMASK_INT_5000	EMASK_INT_B1
+/* MCH 5100: mask all except B3 and B5 */
+#define	EMASK_INT_5100	(~(EMASK_INT_B5|EMASK_INT_B3) & 0xff)
 /* MCH 7300 errata 17 & 20 */
 #define	EMASK_INT_7300	(EMASK_INT_B3|EMASK_INT_B1)
 /* MCH 7300 errata 17,20 & 21 */
@@ -440,6 +445,9 @@
 #define	EMASK_INT_FATAL (EMASK_INT_B7|EMASK_INT_B4|EMASK_INT_B3|EMASK_INT_B2| \
 	EMASK_INT_B1)
 #define	EMASK_INT_NF	(EMASK_INT_B8|EMASK_INT_B6|EMASK_INT_B5)
+#define	EMASK_INT_5100_FATAL	(EMASK_INT_B3|EMASK_INT_B1)
+#define	EMASK_INT_5100_NF	(EMASK_INT_B5)
+
 #define	GE_FBD_FATAL ((nb_chipset == INTEL_NB_5400) ? GE_FERR_FBD_FATAL : \
 	(nb_chipset == INTEL_NB_5100) ? 0 : \
 	(GE_FERR_FBD0_FATAL|GE_FERR_FBD1_FATAL|GE_FERR_FBD2_FATAL| \
--- a/usr/src/uts/intel/io/intel_nb5000/nb5000_init.c	Mon Sep 28 16:13:05 2009 +0100
+++ b/usr/src/uts/intel/io/intel_nb5000/nb5000_init.c	Mon Sep 28 13:33:49 2009 -0400
@@ -120,6 +120,8 @@
 uint_t nb5000_mask_bios_fbd = EMASK_FBD_FATAL;
 uint_t nb5400_mask_poll_fbd = EMASK_5400_FBD_NF;
 uint_t nb5400_mask_bios_fbd = EMASK_5400_FBD_FATAL;
+uint_t nb7300_mask_poll_fbd = EMASK_7300_FBD_NF;
+uint_t nb7300_mask_bios_fbd = EMASK_7300_FBD_FATAL;
 
 int nb5100_reset_emask_mem = 1;
 uint_t nb5100_mask_poll_mem = EMASK_MEM_NF;
@@ -129,6 +131,7 @@
 uint_t nb5000_mask_poll_fsb = EMASK_FSB_NF;
 uint_t nb5000_mask_bios_fsb = EMASK_FSB_FATAL;
 
+uint_t nb5100_emask_int = EMASK_INT_5100;
 uint_t nb5400_emask_int = EMASK_INT_5400;
 
 uint_t nb7300_emask_int = EMASK_INT_7300;
@@ -137,6 +140,8 @@
 int nb5000_reset_emask_int = 1;
 uint_t nb5000_mask_poll_int = EMASK_INT_NF;
 uint_t nb5000_mask_bios_int = EMASK_INT_FATAL;
+uint_t nb5100_mask_poll_int = EMASK_INT_5100_NF;
+uint_t nb5100_mask_bios_int = EMASK_INT_5100_FATAL;
 
 uint_t nb_mask_poll_thr = EMASK_THR_NF;
 uint_t nb_mask_bios_thr = EMASK_THR_FATAL;
@@ -970,8 +975,17 @@
 	uint32_t err2_int;
 	uint32_t mcerr_int;
 	uint32_t emask_int;
+	uint32_t nb_mask_bios_int;
+	uint32_t nb_mask_poll_int;
 	uint16_t stepping;
 
+	if (nb_chipset == INTEL_NB_5100) {
+		nb_mask_bios_int = nb5100_mask_bios_int;
+		nb_mask_poll_int = nb5100_mask_poll_int;
+	} else {
+		nb_mask_bios_int = nb5000_mask_bios_int;
+		nb_mask_poll_int = nb5000_mask_poll_int;
+	}
 	err0_int = ERR0_INT_RD();
 	err1_int = ERR1_INT_RD();
 	err2_int = ERR2_INT_RD();
@@ -990,12 +1004,12 @@
 	MCERR_INT_WR(ERR_INT_ALL);
 	EMASK_INT_WR(ERR_INT_ALL);
 
-	mcerr_int &= ~nb5000_mask_bios_int;
-	mcerr_int |= nb5000_mask_bios_int & (~err0_int | ~err1_int | ~err2_int);
-	mcerr_int |= nb5000_mask_poll_int;
-	err0_int |= nb5000_mask_poll_int;
-	err1_int |= nb5000_mask_poll_int;
-	err2_int |= nb5000_mask_poll_int;
+	mcerr_int &= ~nb_mask_bios_int;
+	mcerr_int |= nb_mask_bios_int & (~err0_int | ~err1_int | ~err2_int);
+	mcerr_int |= nb_mask_poll_int;
+	err0_int |= nb_mask_poll_int;
+	err1_int |= nb_mask_poll_int;
+	err2_int |= nb_mask_poll_int;
 
 	l_mcerr_int = mcerr_int;
 	ERR0_INT_WR(err0_int);
@@ -1012,6 +1026,8 @@
 		} else if (nb_chipset == INTEL_NB_5400) {
 			EMASK_5400_INT_WR(nb5400_emask_int |
 			    (emask_int & EMASK_INT_RES));
+		} else if (nb_chipset == INTEL_NB_5100) {
+			EMASK_5000_INT_WR(nb5100_emask_int);
 		} else {
 			EMASK_5000_INT_WR(nb5000_emask_int);
 		}
@@ -1077,11 +1093,16 @@
 	MCERR_FBD_WR(0xffffffff);
 	EMASK_FBD_WR(0xffffffff);
 
-	if (nb_chipset == INTEL_NB_7300 && nb_mode == NB_MEMORY_MIRROR) {
-		/* MCH 7300 errata 34 */
-		emask_bios_fbd = nb5000_mask_bios_fbd & ~EMASK_FBD_M23;
-		emask_poll_fbd = nb5000_mask_poll_fbd;
-		mcerr_fbd |= EMASK_FBD_M23;
+	if (nb_chipset == INTEL_NB_7300) {
+		if (nb_mode == NB_MEMORY_MIRROR) {
+			/* MCH 7300 errata 34 */
+			emask_bios_fbd = nb7300_mask_bios_fbd & ~EMASK_FBD_M23;
+			emask_poll_fbd = nb7300_mask_poll_fbd;
+			mcerr_fbd |= EMASK_FBD_M23;
+		} else {
+			emask_bios_fbd = nb7300_mask_bios_fbd;
+			emask_poll_fbd = nb7300_mask_poll_fbd;
+		}
 	} else if (nb_chipset == INTEL_NB_5400) {
 		emask_bios_fbd = nb5400_mask_bios_fbd;
 		emask_poll_fbd = nb5400_mask_poll_fbd;