Mercurial > lilug > zarch
view slideshow.tex @ 16:b1fdb7162f8b
storage, and other slide info
author | Josef 'Jeff' Sipek <jeffpc@josefsipek.net> |
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date | Thu, 17 Jan 2008 18:14:16 -0500 |
parents | af0913f3a968 |
children | f4ce0a48f975 |
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\documentclass[pdf,default,slideColor,colorBG,accumulate,nototal]{prosper} %\usepackage{macros-cp} \title{A Dozen Things about the\\ zArchitecture} \subtitle{\vspace*{2cm}} \author{Josef ``Jeff'' Sipek\\ $<$jeffpc@josefsipek.net$>$} \institution{} \slideCaption{Dozen Things about zArch} \begin{document} \maketitle %%% What is zArch? \overlays{9}{ \begin{slide}{What's zArchitecture?} %% Let's start with a very simple question. What is zArchitecture? %% As people say, a picture is worth a thousand words, so I've got a picture %% for you...<animate> \onlySlide*{2}{\begin{center}\includegraphics{syszfamily.eps}\end{center}} %% This is a System z mainframe made by IBM. As you might have guessed from %% the name, it uses the zArchitecture.<animate> \fromSlide*{3}{ \begin{itemize} \item IBM System z mainframes (2006) %% In 2006 IBM's marketing decided to spruce things up a bit, and to rename %% their mainframe line...<animate> \fromSlide*{4}{\item formerly zSeries (2000)} %% zArchitecture was first used by zSeries mainframes all the way back in %% 2000. The zArchitecture in general is a descendent of...<animate> \fromSlide*{5}{\item Descendent of ESA/390 (1990)} %% ESA/390...which was a descendent of...<animate> \fromSlide*{6}{\item Descendent of ESA/370 (1988)} %% ESA/370...which was a descendent of...<animate> \fromSlide*{7}{\item Descendent of 370/XA (1983)} %% 370/XA...which was a descendent of...<animate> \fromSlide*{8}{\item Descendent of System/370 (1970)} %% System/370...which was a descendent of...<animate> \fromSlide*{9}{\item Descendent of System/360 (1964)} %% System/360. The beautiful thing about the whole series of architectures %% is the fact that a user application written and _compiled_ in 1964 can %% run unmodified on the latest IBM mainframe. \end{itemize} } \end{slide}} %%% Aren't mainframes dead? \overlays{3}{ \begin{slide}{0. Aren't mainframes dead?} %% I've hear a number of people tell me that they thought that mainframes %% were dead. Well...<animate> \fromSlide*{2}{ \vspace{1in} \begin{center} \Huge No!\normalsize %% No! Mainframes are not dead. They just happen to be overshadowed by the %% sheer volume of desktops, laptops, and servers sold. Mainframes have a %% very specific design goal - they are NOT the fastest computers out there, %% they are NOT the computers with most cores, or memory; they are meant to %% run 24/7 and have 100% availability. With careful planning, you can even %% update the hardware without losing your "internet presence."<animate> \vspace{1cm} \fromSlide*{3}{Ok, this one was a freebie...} %% I said that you'd hear a dozen things...this one was too easy to count, %% so let's count it as a freebie - let's make the presentation a baker's %% dozen of things about zArch. %% %% With that said, let's move onto the core of the presentation... \end{center} } \end{slide}} %%% Random Trivia \overlays{5}{ \begin{slide}{1. Random Trivia} \begin{itemstep} \item ``Storage'' is RAM, \emph{not} disk \item Big endian machine \item MSB is bit 0 \item Instruction retry \item This presentation is too short to summarize >1200 pages of documentation \end{itemstep} \end{slide}} %%% Backwards compatibility \overlays{8}{ \begin{slide}{2. Backwards Compatibility} \begin{itemstep} \item Full \emph{application} backwards compatibility \begin{itemstep} \item Take a binary from 1960's \item Run unmodified on zSeries \item Same output, but faster! \item Cannot remove unprivileged instructions \end{itemstep} \item OS should... \begin{itemstep} \item Use new facilities \item Hide the differences from applications \end{itemstep} \end{itemstep} \end{slide}} %%% Specs \overlays{12}{ \begin{slide}{3. Specifications} \begin{itemstep} \item 6 types of Processor Units (PUs) \begin{itemstep} %% Central Processor \item CP: generic PU %% Integrated Facility for Linux \item IFL: like CP, lacking $\sim$2 instructions, perfect for Linux %% Internal Coupling Facility \item ICF: (runs special firmware) %% Application Assist Processor \item zAAP: for Java workloads %% Information Integration Processor \item zIIP: for DB workloads %% System Assist Processor \item SAP: manages I/O (runs special firmware) \end{itemstep} \item 1 to 54 PUs \item 16 to 512 GB of storage \item 1212 to 2003 kg (2672 to 4407 lbs) \item 6.3 to 18.3 kW \item 21.5 to 62.4 kBTU/hr \end{itemstep} \end{slide}} \overlays{1}{ \begin{slide}{4. Architecture Modes} \begin{itemize} \item 2 supported modes \item ESA/390 \begin{itemize} \item 31-bit addressing \item 32-bit arithmetic \end{itemize} \item z/Architecture \begin{itemize} \item Superset of ESA/390 \item 64-bit addressing \item 64-bit arithmetic \end{itemize} \item Switch between modes at run time \end{itemize} \end{slide}} \overlays{2}{ \begin{slide}{?. Storage} \untilSlide*{1}{ \begin{itemize} \item Dynamic Address Translation (with a TLB) \begin{itemize} \item 3 translation modes \item Up to 15 address spaces can be used at any time \end{itemize} \item Page protection \item Low-address protection \item Storage keys \end{itemize} } \fromSlide*{2}{ \begin{center}\includegraphics[height=2.5in]{storage.eps}\end{center} } \end{slide}} \overlays{1}{ \begin{slide}{?. Addressing Modes} \begin{itemize} \item \emph{Addressing} and \emph{architecture} modes are independently set \item When in ESA/390 \emph{arch} mode \begin{itemize} \item 24-bit, or 31-bit addressing \begin{itemize} \item 16MB or 2GB of addressable storage \end{itemize} \item Bit 32 (Basic Addressing -- BA) in PSW \end{itemize} \item When in z/Architecture \emph{arch} mode \begin{itemize} \item 24-bit, 31-bit, or 64-bit addressing \item Bits 31 (Extended Addressing -- EA) \& 32 (BA) in PSW must be 1 \begin{itemize} \item 16MB, 2GB, or 16EB of addressable storage \end{itemize} \end{itemize} \end{itemize} \end{slide}} \overlays{1}{ \begin{slide}{?. Registers} \begin{itemize} \item 16 General purpose registers (64/32-bit) \item 16 Floating point registers (64-bit) \item 16 Access registers (32-bit) \item 16 Control registers (64/32-bit) % floating point control register % prefix register \item Program-Status Word (PSW) \end{itemize} \end{slide}} \overlays{1}{ \begin{slide}{?. Instruction Set} \begin{itemize} \item CISC architecture \begin{itemize} \item Complex Instruction Set Computer \item System/360 (November 1970) had 143 instructions \item z9 (September 2005) describes 689 instructions \begin{itemize} \item 41 variations of ADD \end{itemize} \end{itemize} \item Instructions are always... \begin{itemize} \item 2, 4, or 6 bytes long \item Aligned on 2-byte boundary \end{itemize} \item Many instructions reference storage \end{itemize} FIXME: mention encryption \end{slide}} % 10) % 11) %%% Interruptions \overlays{1}{ \begin{slide}{?. Interruptions} \begin{itemize} \item 6 Classes of interruptions \begin{itemize} \item Restart \item External (e.g., timers) \item Supervisor-call (e.g., used for ``system calls'') \item Program (e.g., DAT faults, integer over/under-flows) \item Machine-check (e.g., hardware malfunctions) \item I/O (e.g., operation complete, device req. attention) \end{itemize} \item A number of them can be masked out \end{itemize} \end{slide}} %%% Channels \overlays{6}{ \begin{slide}{?. Channels} % channel subsystem - don't load up the CPU with unnecessary cruft \fromSlide*{1}{ \begin{itemstep} \item CPUs are meant to run user code \item Baby-sitting IO wastes time \item Prepare an IO operation on a CPU \item Let co-processors execute it \item CPU can continue executing user applications \item Similar to DMA, but \emph{way} more advanced \end{itemstep} } \end{slide}} \overlays{6}{ \begin{slide}{?. Channels - Connections} \begin{tabular}{ll} \begin{minipage}{2.5in} \begin{itemstep} \item A device is attached to a Control Unit \item Control Units are connected to... \begin{itemstep} \item Storage \item CPUs \end{itemstep} \item \emph{Logical} link between a device and CPU is a \emph{subchannel} \item \emph{Physical} connections are a lot more complex \end{itemstep} \end{minipage} & \begin{minipage}{2in} \begin{center}\includegraphics[height=2.5in]{channels.eps}\end{center} \end{minipage}\\ \end{tabular} \end{slide}} \overlays{5}{ \begin{slide}{?. Channels - Issuing I/O} \begin{tabular}{ll} \begin{minipage}{2.5in} \begin{itemstep} \item Save Channel Command Words (CCWs) in storage \item Signal CU to execute stored commands \item CU generates an IO interrupt when... \begin{itemstep} \item IO completes \item Error occurs \end{itemstep} \end{itemstep} \end{minipage} & \begin{minipage}{2in} \begin{center}\includegraphics[height=2.5in]{channels.eps}\end{center} \end{minipage}\\ \end{tabular} \end{slide}} \overlays{7}{ \begin{slide}{?. Channels - CCWs} \begin{center}\includegraphics[height=1in]{ccw.eps}\end{center} \fromSlide*{2}{ \begin{itemize} \item Command \onlySlide*{3}{ \begin{itemize} \item Write \item Read \item Read Backward \item Control \item Sense \item Sense ID \item Transfer in Control (branch!) \end{itemize} } \fromSlide*{4}{\item Flags} \onlySlide*{5}{ \begin{itemize} \item CCWs chaining \item Skip (do not read) \item Indirect addressing (2 modes: IDA, MIDA) \item Suspend execution \item ... \end{itemize} } \fromSlide*{6}{\item Byte count} \fromSlide*{7}{\item Buffer address} \end{itemize} } \end{slide}} %%% SIE \overlays{12}{ \begin{slide}{?. Interpretive-Execution Facility} \begin{itemstep} \item Virtualization the proper way \item Instruction --- \texttt{\textbf{SIE}} \begin{itemstep} \item Runs virtually all instructions natively \item Hardware-speed most of the time \item Some instructions are intercepted, host must... \begin{itemstep} \item Emulate the instruction \item Reissue \texttt{\textbf{SIE}} \end{itemstep} \end{itemstep} \item \texttt{\textbf{SIE}} uses a State Descriptor \begin{itemstep} \item Guest PSW \item Guest control registers \item Defines guest storage \item Interception controls \end{itemstep} \end{itemstep} \end{slide}} %%% My thoughts... \overlays{7}{ \begin{slide}{My thoughts exactly...} \begin{itemstep} \item ``This architecture is awesome!'' \item ``I wish I could play with one.'' \begin{itemstep} \item Hercules: open source emulator \end{itemstep} \item ``I wish I could run Linux on it.'' \begin{itemstep} \item You can! \end{itemstep} \item ``I wish I could write an OS for it.'' \begin{itemstep} \item Funny you should ask... \end{itemstep} \end{itemstep} \end{slide}} %%% HVF \overlays{6}{ \begin{slide}{HVF} \begin{itemstep} \item OS/Hypervisor \item z/Architecture \item Written from scratch \item Mostly C, with few bits of assembly \item Announced January 11, 2008 \item GPLv2 \end{itemstep} \end{slide}} \overlays{1}{ \begin{slide}{HVF - Repository Size} \begin{center} \includegraphics[height=3in]{hvf_lines.eps} \end{center} \end{slide}} \overlays{12}{ \begin{slide}{HVF - Status \& TODO} \begin{itemstep} \item What's done \begin{itemstep} \item Buddy \& SLAB allocators \item Virtual memory \item Basic console IO \end{itemstep} \item What needs to be done \begin{itemstep} \item $\sim$30 \texttt{\textbf{FIXME}}s of varying difficulty \item User directory (currently WIP) \item Virtual devices/IO proxying \item Testing, and more testing \end{itemstep} \item Contact info \begin{itemstep} \item Mailing list: \url{lists.josefsipek.net/listinfo/hvf} \item \texttt{\textbf{\#hvf}} on OFTC \end{itemstep} \end{itemstep} \end{slide}} \overlays{1}{ \begin{slide}{Questions?} \begin{center} \includegraphics{syszfamily.eps} \end{center} \end{slide}} \overlays{1}{ \begin{slide}{References} \begin{itemize} \item z/Architecture Principles of Operation (SA22-7832-05) \item System z Architecture Course \item System/370 XA --- Interpretive Execution (SA22-7095-1) \item Hercules Emulator\\ \url{www.hercules-390.org} \item Installing Debian under Hercules \url{www.josefsipek.net/docs/s390-linux/} \end{itemize} \end{slide}} \end{document}