view arch/io.c @ 12:40af39d064fa

Refactor the arch code Note: the code, as it is now, does not run even though it compiles
author Josef 'Jeff' Sipek <jeffpc@josefsipek.net>
date Thu, 07 Apr 2011 22:07:20 -0400
parents 0451ffa1c3a0
children c75be274ce23
line wrap: on
line source

#include "channel.h"
#include <die.h>

/* console I/O functions */

static struct irb irb;
static struct orb orb;
static struct ccw ccw;

u32 find_dev(int devnum)
{
	struct schib schib;
	u32 sch;

	for(sch=0x10000; sch<=0x1ffff; sch++) {
		if (store_sch(sch, &schib))
			continue;

		if (!schib.pmcw.v)
			continue;

		if (schib.pmcw.dev_num != devnum)
			continue;

		schib.pmcw.e = 1;

		if (modify_sch(sch, &schib))
			continue;

		return sch;
	}

	return 0;
}

static void enable_cons(int devnum)
{
	struct psw psw;
	u32 sch;

	sch = find_dev(devnum);

	if (!sch)
		die();

	// found it

	// set up the IO interrupt handler
	psw.ea  = 1;
	psw.ba  = 1;

	asm volatile(
		"       larl    %%r1,0f\n"
		"       stg     %%r1,%0\n"
		"	brc	15,1f\n"
		/* IO handler code begins */
		"0:\n"
		"	l	%%r1,0xb8\n"
		"	larl	%%r2,irb\n"
		"	tsch	0(%%r2)\n"
		"	l	%%r1,5(%%r2)\n"
		"	nill	%%r1,0x04\n"
		"	brc	8,2f\n" // done?
		"	lg	%%r1,0x178\n" // yes.
		"	bcr	15,%%r1\n"
		"2:\n"
		"	l	%%r1,5(%%r2)\n"
		"	nill	%%r1,0x80\n"
		"	brc	8,3f\n" // attention?
		"	lg	%%r1,0x178\n" // yes.
		"	bcr	15,%%r1\n"
		"3:\n"
		"	lpswe	0x170\n"
		/* IO handler code ends */
		"1:\n"
	: /* output */
	  "=m" (psw.ptr),
	  "=m" (irb)
	: /* input */
	  "a" (&irb)
	: /* clobbered */
	  "r1", "r2"
	);

	__builtin_memcpy(((void*) 0x1f0), &psw, sizeof(struct psw));
}