Mercurial > sos > sos
changeset 0:5d9f272f4db6
import template
| author | Josef 'Jeff' Sipek <jeffpc@josefsipek.net> |
|---|---|
| date | Thu, 24 Feb 2011 23:04:37 -0500 |
| parents | |
| children | 29382f5864ca |
| files | .hgignore Makefile README hercules/herc.cnf include/system.h ipl/ipl.S ipl/linker.script ipl/loader.c ipl/loader_asm.S ipl/setmode.S scripts/gen_ccws.sh scripts/linker.script src/init.c src/io.c |
| diffstat | 14 files changed, 1658 insertions(+), 0 deletions(-) [+] |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/.hgignore Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,7 @@ +\.o$ +\.rto$ +^ipl/ipl_ccws\.S$ +^sarpn$ +^loader\.bin$ +^cscope\.out$ +\.swp$
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/Makefile Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,66 @@ +CROSS_COMPILE=s390x-linux- +AS=$(CROSS_COMPILE)as +CC=$(CROSS_COMPILE)gcc +LD=$(CROSS_COMPILE)ld +OBJCOPY=$(CROSS_COMPILE)objcopy + +MAKEFLAGS += -rR --no-print-directory +CFLAGS=-g -fno-strict-aliasing -fno-builtin -nostdinc -nostdlib -Wall -m64 -I include/ -O2 +LDFLAGS=-m elf64_s390 + +OBJS=src/init.o src/io.o + +.PHONY: all build clean tags + +all: sarpn loader.bin + @echo "Image is `stat -c %s sarpn` bytes" + @echo "Loader is `stat -c %s loader.bin` bytes" + +clean: + rm -f $(OBJS) + rm -f sarpn + rm -f loader.bin ipl/*.o ipl/*.rto ipl/ipl_ccws.S cscope.out + +tags: + cscope -R -b + +sarpn: $(OBJS) + $(LD) $(LDFLAGS) -T scripts/linker.script -o $@ $^ + +%.o: %.S + $(AS) -m64 -o $@ $< + +%.o: %.c + $(CC) $(CFLAGS) -include include/system.h -c -o $@ $< + +# +# IPL specific bits +# + +.PRECIOUS: ipl/loader.o ipl/loader_c.o ipl/loader_asm.o ipl/setmode.o \ + ipl/ipl_ccws.o ipl/ipl.o + +loader.bin: ipl/ipl.rto ipl/ipl_ccws.rto ipl/setmode.rto ipl/loader.rto + cat $^ > $@ + ( len=`stat -c %s "$@"`; dif=`expr $$len % 80`; if [ $$dif -ne 0 ]; then dif=`expr 80 - $$dif`; dd if=/dev/zero bs=1 count=$$dif 2> /dev/null >> "$@"; fi) + +ipl/loader_asm.o: ipl/loader_asm.S + $(AS) -m64 -o $@ $< + +ipl/loader_c.o: ipl/loader.c sarpn + $(CC) $(CFLAGS) -DBLOCK_SIZE=80 -DBYTES_TO_READ=`stat -c '%s' sarpn` -c -o $@ $< + +ipl/ipl_ccws.S: ipl/setmode.rto ipl/loader.rto + bash scripts/gen_ccws.sh $@ + +ipl/loader.rto: ipl/loader.o + $(OBJCOPY) -O binary -j .text -j .data -j .rodata $< $@ + +ipl/loader.o: ipl/loader_c.o ipl/loader_asm.o + $(LD) -melf64_s390 -T ipl/linker.script -o $@ $^ + +ipl/%.rto: ipl/%.o + $(OBJCOPY) -O binary -j .text $< $@ + +ipl/%.o: ipl/%.S + $(AS) -m64 -o $@ $<
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/README Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,91 @@ +This README will help you figure out what this minimal system does. In +short, it doesn't do a whole lot. Making it do something useful is up to +you. + +You can safely ignore: + ipl/* + scripts/* + src/io.c + +You can put your code in src/ and your include files in include/. If you +add any .c files, you'll have to add them to the OBJS line in the Makefile. + +Building +-------- + +First, you should make sure that the cross building tools are in your path. +For example, my system has /opt/cross/bin in $PATH. + +In the top level directory, you simply run `make'. + +Running +------- + +Go into the hercules directory, and run: + +$ hercules -f herc.cnf + +Then, in another terminal, run: + +$ telnet 127.0.0.1 3270 + +Hercules is the emulator for the system that you are developing for (x86 is +awful to develop for in a stand-alone way). + +Now, in the Hercules window, you can type: + +==> ipl c + +That tells it to start executing whatever program is on device 0x000c. This +happens to be whatever got compiled before. (IPL stands for Initial Program +Load.) Once you tell the emulator to run your code, you can interact with +your code in the telnet session. + +If at any point you see a message in the Hercules window about the +processor stopping due to a SIGP or a "disabled wait state" you have a bug +in your code. + +The Internals +------------- + +After the init code runs, it calls the start function in src/init.c. It +takes one argument, which specifies the amount of memory you have. If, for +example, it it given 1048576, you know that addresses 0...1048575 are valid. +Note that unlike the standard C/C++ application environment, you can +load from/store to any of those addresses. Accessing a NULL pointer will +NOT result in a SIGSEGV or a similar death of the program. There are a few +ranges of memory that you should know about. + + 0... 8191 hw state area (the hw stores status info here, do not touch) + 8192... + ...1048575 the stack +1048576... the code & globals + +In English, the first 8k is used by the hardware to store important state. +You will not need to read/modify this state. The code starts at 1MB, and +takes up whatever amount of space is necessary for it. The stack starts at +1MB and grows downward. You can do whatever you want with the unused +memory. (My suggestion is to assume that the code + globals will not take +more than say 512kB, the stack no more than 512kB, and then think of the +layout as: + + 0k... 8k hw state + 8k...512k free +512k... 1M stack + 1M...1.5M code + globals +1.5M... free + +That's my suggestion. It's not the only way to do this, but it's simple to +think about.) + +There are 2 more functions that you are provided: + +int putline(char *buf, int len) + prints len characters pointed to by buf; it returns -1 if the + length is invalid, or the length once the I/O completes + + +int getline(char *buf, int len) + reads a line of text and saves up to len characters at buf; it + returns -1 if the length is invalid, or the number of bytes put into + buf
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/hercules/herc.cnf Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,18 @@ +CPUSERIAL 314359 # CPU serial number +CPUMODEL 2097 # CPU model number +MAINSIZE 128 # Main storage size in megabytes +XPNDSIZE 0 # Expanded storage size in megabytes +CNSLPORT 3270 # TCP port number to which consoles connect +NUMCPU 1 # Number of CPUs +#OSTAILOR QUIET # OS tailoring +OSTAILOR NULL # OS tailoring +PANRATE SLOW # Panel refresh rate + +# .-----------------------Device number +# | .-----------------Device type +# | | .---------File name and parameters +# | | | +# V V V +#--- ---- -------------------- +0009 3215 +000C 3505 ../loader.bin ../sarpn ebcdic multifile
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/include/system.h Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,21 @@ +#ifndef __SYSTEM_H +#define __SYSTEM_H + +#define NULL ((void*) 0) + +typedef unsigned long long u64; +typedef signed long long s64; + +typedef unsigned int u32; +typedef signed int s32; + +typedef unsigned short u16; +typedef signed short s16; + +typedef unsigned char u8; +typedef signed char s8; + +extern int putline(char *buf, int len); +extern int getline(char *buf, int len); + +#endif
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/ipl/ipl.S Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,88 @@ +# During the system IPL, 24 bytes are read from the device. +# +# NOTE: zArch IPLs in ESA/390 mode. +# + +# +# Bytes 0-7 contain PSW to be loaded after IO operation completes +# + .byte 0x00 + # bits value name desc + # 0 0 <zero> + # 1 0 PER Mask (R) disabled + # 2-4 0 <zero> + # 5 0 DAT Mode (T) disabled + # 6 0 I/O Mask (IO) disabled + # 7 0 External Mask (EX) disabled + + .byte 0x08 + # bits value name desc + # 8-11 0 Key + # 12 1 <one> + # 13 0 Machine-Check Mask (M) disabled + # 14 0 Wait State (W) executing + # 15 0 Problem State (P) supervisor state + + .byte 0x00 + # bits value name desc + # 16-17 0 Address-Space Control (AS) disabled + # 18-19 0 Condition Code (CC) + # 20-23 0 Program Mask exceptions disabled + + .byte 0x00 + # bits value name desc + # 24-30 0 <zero> + # 31 0 Extended Addressing (EA) ! 64 mode + + .byte 0x80 # bits 32-39 + .byte 0x80 # bits 40-47 + .byte 0x00 # bits 48-55 + .byte 0x00 # bits 56-63 + # bits value name desc + # 32 1 Basic Addressing (BA) BA = 31, !BA = 24 + # 33-63 addr Instruction Address Address to exec + +# +# The remaining 16 bytes should contain CCW to read data from device +# + +# CCW format-0: +# bits name +# 0-7 Cmd Code +# 8-31 Data Address +# 32 Chain-Data (CD) +# 33 Chain-Command (CC) +# 34 Sup.-Len.-Inditcation (SLI) +# 35 Skip (SKP) +# 36 Prog.-Contr.-Inter. (PCI) +# 37 Indir.-Data-Addr. (IDA) +# 38 Suspend (S) +# 39 Modified I.D.A. (MIDA) +# 40-47 <ignored> +# 48-63 number of bytes to read + +# +# CCW 1 (bytes 8-15): format-0 +# + # read 80 bytes to 0x18 + .byte 0x02, 0x00, 0x00, 0x18 + .byte 0x60, 0x00, 0x00, 0x50 + +# +# CCW 2 (bytes 16-23): format-0 +# + # read 24 bytes to 0x68 + .byte 0x02, 0x00, 0x00, 0x68 + .byte 0x60, 0x00, 0x00, 0x18 + +# +# Pad to fill up a whole card +# + .byte 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 # bytes 24-31 + .byte 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 # bytes 32-39 + .byte 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 # bytes 40-47 + .byte 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 # bytes 48-55 + .byte 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 # bytes 56-63 + .byte 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 # bytes 64-71 + .byte 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 # bytes 72-79 +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/ipl/linker.script Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,9 @@ +SECTIONS +{ + ENTRY(load_system) + . = 0x800020; + .text : { *(.text) } + .data : { *(.data) } + .rodata : { *(.rodata) } + .bss : { *(.bss) } +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/ipl/loader.c Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,430 @@ +#ifndef BYTES_TO_READ +#error missing BYTES_TO_READ +#endif + +#if BYTES_TO_READ > 0x300000 +#error The system size is limited to 3MB +#endif + +#ifndef BLOCK_SIZE +#error missing BLOCK_SIZE +#endif + +#define TEMP_BASE ((unsigned char*) 0x400000) /* 4MB */ + +typedef unsigned long u64; +typedef signed long s64; + +typedef unsigned int u32; +typedef signed int s32; + +typedef unsigned short u16; +typedef signed short s16; + +typedef unsigned char u8; +typedef signed char s8; + +#define EI_MAG0 0 +#define EI_MAG1 1 +#define EI_MAG2 2 +#define EI_MAG3 3 +#define EI_CLASS 4 +#define EI_DATA 5 +#define EI_VERSION 6 +#define EI_OSABI 7 +#define EI_ABIVERSION 8 +#define EI_PAD 9 +#define EI_NIDENT 16 + +#define ELFCLASS32 1 +#define ELFCLASS64 2 + +#define ELFDATA2LSB 1 +#define ELFDATA2MSB 2 + +#define EV_CURRENT 1 + +#define ET_NONE 0 +#define ET_REL 1 +#define ET_EXEC 2 +#define ET_DYN 3 +#define ET_CORE 4 +#define ET_LOOS 0xfe00 +#define ET_HIOS 0xfeff +#define ET_LOPROC 0xff00 +#define ET_HIPROC 0xffff + +#define SHT_NULL 0 +#define SHT_PROGBITS 1 +#define SHT_SYMTAB 2 +#define SHT_STRTAB 3 +#define SHT_RELA 4 +#define SHT_HASH 5 +#define SHT_DYNAMIC 6 +#define SHT_NOTE 7 +#define SHT_NOBITS 8 +#define SHT_REL 9 +#define SHT_SHLIB 10 +#define SHT_DYNSYM 11 +#define SHT_LOOS 0x60000000 +#define SHT_HIOS 0x6fffffff +#define SHT_LOPROC 0x70000000 +#define SHT_HIPROC 0x7fffffff + +typedef u64 Elf64_Addr; +typedef u64 Elf64_Off; +typedef u16 Elf64_Half; +typedef u32 Elf64_Word; +typedef s32 Elf64_Sword; +typedef u64 Elf64_Xword; +typedef s64 Elf64_Sxword; + +/* + * ELF file header + */ +typedef struct { + unsigned char e_ident[EI_NIDENT]; /* ELF identification */ + Elf64_Half e_type; /* Object file type */ + Elf64_Half e_machine; /* Machine type */ + Elf64_Word e_version; /* Object file version */ + Elf64_Addr e_entry; /* Entry point address */ + Elf64_Off e_phoff; /* Program header offset */ + Elf64_Off e_shoff; /* Section header offset */ + Elf64_Word e_flags; /* Processor-specific flags */ + Elf64_Half e_ehsize; /* ELF header size */ + Elf64_Half e_phentsize; /* Size of program header entry */ + Elf64_Half e_phnum; /* Number of program header entries */ + Elf64_Half e_shentsize; /* Size of section header entries */ + Elf64_Half e_shnum; /* Number of section header entries */ + Elf64_Half e_shstrndx; /* Section name string table index */ +} Elf64_Ehdr; + +/* + * ELF section header + */ +typedef struct { + Elf64_Word sh_name; /* Section name */ + Elf64_Word sh_type; /* Section type */ + Elf64_Xword sh_flags; /* Section attributes */ + Elf64_Addr sh_addr; /* Virtual address in memory */ + Elf64_Off sh_offset; /* Offset in file */ + Elf64_Xword sh_size; /* Size of section */ + Elf64_Word sh_link; /* Link to other section */ + Elf64_Word sh_info; /* Misc information */ + Elf64_Xword sh_addralign; /* Address alignment boundary */ + Elf64_Xword sh_entsize; /* Size of entries, if section has table */ +} Elf64_Shdr; + +static unsigned char read_ccw[8] __attribute__ ((aligned (8))) = { + /* + * CCW2; read the entire system ELF + */ + + 0x02, + /* bits value name desc */ + /* 0-7 2 Cmd Code read, no modifiers*/ + + 0xff, 0xff, 0xff, + /* bits value name desc */ + /* 8-31 addr Data Address dest of the read */ + + 0x20, + /* bits value name desc */ + /* 32 0 Chain-Data (CD) don't chain */ + /* 33 0 Chain-Command (CC) don't chain */ + /* 34 1 Sup.-Len.-Inditcation (SLI) suppress */ + /* 35 0 Skip (SKP) issue read */ + /* 36 0 Prog.-Contr.-Inter. (PCI) don't interrupt */ + /* 37 0 Indir.-Data-Addr. (IDA) real addr */ + /* 38 0 Suspend (S) don't suspend */ + /* 39 0 Modified I.D.A. (MIDA) real addr */ + + 0x00, + /* bits value name desc */ + /* 40-47 0 <ignored> */ + + 0xff, 0xff, + /* bits value name desc */ + /* 48-63 len number of bytes to read */ +}; + +unsigned char ORB[32] __attribute__ ((aligned (16))) = { + /* Word 0 */ + 0x12,0x34,0x56,0x78, + /* bits value name desc */ + /* 0-31 magic Interrupt Parameter */ + + /* Word 1 */ + 0x00, + /* bits value name desc */ + /* 0-3 0 Subchannel Key */ + /* 4 0 Suspend Control */ + /* 5 0 Streaming-Mode Control */ + /* 6 0 Modification Control */ + /* 7 0 Synchronization Control */ + + 0x00, + /* bits value name desc */ + /* 8 0 Format Control format-0 CCWs */ + /* 9 0 Prefetch Control */ + /* 10 0 Initial-Status-Interruption Control */ + /* 11 0 Address-Limit-Checking Control */ + /* 12 0 Suppress-Suspended-Interruption Control */ + /* 13 0 <zero> */ + /* 14 0 Format-2-IDAW Control */ + /* 15 0 2K-IDAW Control */ + + 0xff, + /* bits value name desc */ + /* 16-23 0xff Logical-Path Mask All paths */ + + 0x00, + /* bits value name desc */ + /* 24 0 Incorrect-Length-Suppression Mode */ + /* 25 0 Modified-CCW-Indirect-Data-Addressing Control*/ + /* 26-30 0 <zero> */ + /* 31 0 ORB-Extension Control */ + + /* Word 2 */ + 0xff,0xff,0xff,0xff, + /* bits value name desc */ + /* 0-31 addr Channel-Program Address */ + + /* Word 3 */ + 0x00, + /* bits value name desc */ + /* 0-7 0 Channel-Subsystem Priority */ + + 0x00, + /* bits value name desc */ + /* 8-15 0 <zero/reserved> */ + + 0x00, + /* bits value name desc */ + /* 15-23 0 Control-Unit Priority */ + + 0x00, + /* bits value name desc */ + /* 24-31 0 <zero/reserved> */ + + /* Word 4 */ + 0x00,0x00,0x00,0x00, + /* bits value name desc */ + /* 0-31 0 <zero/reserved> */ + + /* Word 5 */ + 0x00,0x00,0x00,0x00, + /* bits value name desc */ + /* 0-31 0 <zero/reserved> */ + + /* Word 6 */ + 0x00,0x00,0x00,0x00, + /* bits value name desc */ + /* 0-31 0 <zero/reserved> */ + + /* Word 7 */ + 0x00,0x00,0x00,0x00, + /* bits value name desc */ + /* 0-31 0 <zero/reserved> */ +}; + +#define memcpy(d,s,l) __builtin_memcpy((d), (s), (l)) +#define memset(s,c,n) __builtin_memset((s),(c),(n)) + +/* + * halt the cpu + * + * NOTE: we don't care about not clobbering registers as when this + * code executes, the CPU will be stopped. + */ +static inline void die() +{ + asm volatile( + "SR %r1, %r1 # not used, but should be zero\n" + "SR %r3, %r3 # CPU Address\n" + "SIGP %r1, %r3, 0x05 # Signal, order 0x05\n" + ); + + /* + * Just in case SIGP fails + */ + for(;;); +} + +/* + * It is easier to write this thing in assembly... + */ +extern void __do_io(); +extern void PGMHANDLER(); + +static u64 pgm_new_psw[2] = { + 0x0000000180000000ULL, (u64) &PGMHANDLER, +}; + +static u64 pgm_new_psw_real[2] = { + 0x0002000180000000ULL, 0xfa11, +}; + +/* + * determine amount of storage + */ +static u64 sense_memsize() +{ + u64 size; + int cc; + +#define SKIP_SIZE (1024*1024ULL) + + /* set new PGM psw */ + memcpy((void*)0x1d0, pgm_new_psw, 16); + + for(size = 0; size < ((u64)~SKIP_SIZE)-1; size += SKIP_SIZE) { + asm volatile( + "lg %%r1,%1\n" + "tprot 0(%%r1),0\n" + "ipm %0\n" + "srl %0,28\n" + : /* output */ + "=d" (cc) + : /* input */ + "m" (size) + : /* clobber */ + "cc", "r1" + ); + + /* + * we cheat here a little...if we try to tprot a location + * that isn't part of the configuration, a program exception + * fires off, but our handler sets the CC to 3, and resumes + * execution + */ + if (cc == 3) + break; + } + + /* invalidate new PGM psw */ + memcpy((void*)0x1d0, pgm_new_psw_real, 16); + + return size; +} + +/* + * read the entire system into into TEMP_BASE + */ +static inline void readsystem() +{ + register unsigned long base; + + /* + * Read in BLOCK_SIZE chunks of system + */ + + /* set the CCW address in the ORB */ + *((u32 *) &ORB[8]) = (u32) (u64) read_ccw; + + read_ccw[6] = ((unsigned char) (BLOCK_SIZE >> 8) & 0xff); + read_ccw[7] = ((unsigned char) (BLOCK_SIZE & 0xff)); + + base = (unsigned long) TEMP_BASE; + for( ; + (base - (unsigned long)TEMP_BASE) < BYTES_TO_READ; + base += BLOCK_SIZE) { + read_ccw[1] = ((unsigned char) (base >> 16)); + read_ccw[2] = ((unsigned char) (base >> 8) & 0xff); + read_ccw[3] = ((unsigned char) (base & 0xff)); + __do_io(); + } +} + +static inline void enable_bfp() +{ + u64 cr0; + + asm volatile( + "stctg 0,0,%0\n" + "oi %1,0x04\n" + "lctlg 0,0,%0\n" + : /* output */ + : /* input */ + "m" (cr0), + "m" (*(u64*) (((u8*)&cr0) + 5)) + ); +} + +void load_system(void) +{ + /* + * These are all stored in registers + */ + register int i; + register Elf64_Ehdr *system_elf; + register Elf64_Shdr *section; + register void (*start_sym)(u64); + + /* + * Read entire ELF to temporary location + */ + readsystem(); + + system_elf = (Elf64_Ehdr*) TEMP_BASE; + + /* + * Check that this looks like a valid ELF + */ + if (system_elf->e_ident[0] != '\x7f' || + system_elf->e_ident[1] != 'E' || + system_elf->e_ident[2] != 'L' || + system_elf->e_ident[3] != 'F' || + system_elf->e_ident[EI_CLASS] != ELFCLASS64 || + system_elf->e_ident[EI_DATA] != ELFDATA2MSB || + system_elf->e_ident[EI_VERSION] != EV_CURRENT || + system_elf->e_type != ET_EXEC || + system_elf->e_machine != 0x16 || // FIXME: find the name for the #define + system_elf->e_version != EV_CURRENT) + die(); + + /* + * Iterate through each section, and copy it to the final + * destination as necessary + */ + for (i=0; i<system_elf->e_shnum; i++) { + section = (Elf64_Shdr*) (TEMP_BASE + + system_elf->e_shoff + + system_elf->e_shentsize * i); + + switch (section->sh_type) { + case SHT_PROGBITS: + if (!section->sh_addr) + break; + + /* + * just copy the data from TEMP_BASE to + * where it wants to be + */ + memcpy((void*) section->sh_addr, + TEMP_BASE + section->sh_offset, + section->sh_size); + break; + case SHT_NOBITS: + /* + * No action needed as there's no data to + * copy, and we assume that the ELF sections + * don't overlap + */ + memset((void*) section->sh_addr, + 0, section->sh_size); + break; + default: + /* Ignoring */ + break; + } + } + + enable_bfp(); + + /* + * Now, jump to the system entry point + */ + start_sym = (void*) system_elf->e_entry; + start_sym(sense_memsize()); +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/ipl/loader_asm.S Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,245 @@ +.text + .align 4 +.globl __do_io + .type __do_io, @function +__do_io: + # + # r4 = 0x80000000 + # + XGR %r4, %r4 + LHI %r4, 0x8 + SLL %r4, 20 + # + # r14 = r14 & 0x7fffffff don't ask, it's strangely retarded + # + L %r1,ADDRMASK(%r4) + NR %r14, %r1 # mask out the bit + + # set up the interrupt handler + MVC 0x1f0(16),IOPSW(%r4) # SET NEW IO PSW + LA %r1,IOHANDLER(%r4) # GET HANDLER ADDRESS + STG %r1,0x1f0+8 # SAVE IN NEW PSW + + L %r1, 0xb8 # load subsystem ID + + SSCH ORB(%r4) # issue IO + + # Load Control Register 6 with I/O interrupt subclass mask + STCTG 6,6,TMPVAR(%r4) # GET CR6 + OI TMPVAR+4(%r4),0xFF # enable all + LCTLG 6,6,TMPVAR(%r4) # RELOAD MODIFIED CR6 + +/* +7) Enable the PSW for I/O interrupts and go into wait state (you need bits 6, 12 & 14 set to 1 in the PSW : X'020A000000000000' is a good example) +*/ + LA %r3, RETURN(%r4) # interrupt return address + #STG %r1, WAITPSW+8(%r4) + + LPSWE WAITPSW(%r4) + +RETURN: + SR %r2, %r2 # return 0 + BR %r14 # Done, let's go back to C! + +# +# The IO interrupt handler +# +.globl IOHANDLER +IOHANDLER: + # is this for us? + L %r1, MAGICVAL(%r4) + C %r1, 0xbc + BNE IONOTDONE(%r4) + + # it is! + + L %r1, 0xb8 # load subsystem ID + + TSCH IRB(%r4) + + # check the SCSW.. If CE Only : LPSW Old I/O PSW + L %r1, IRB+5(%r4) + NILL %r1, 0x04 + BC 8, IONOTDONE(%r4) # not device end => LPSWE + +/* +FIXME: we should do more checking! + +11) If Unit check or Channel Status|=0 : An I/O error occurred and act accordingly +12) If unit exception : End of media (for tape & cards) and act accordingly +13) If device end : I/O Completed.. Perform post I/O stuff (like advancing your pointers) and back to step 3 +*/ + + # return to the "caller" + BR %r3 + +IONOTDONE: + LPSWE 0x170 + +# +# The PGM interrupt handler +# +.globl PGMHANDLER +PGMHANDLER: + STMG %r1,%r3,0x200 + + # r3 = 0x80000000 + XGR %r3, %r3 + LHI %r3, 0x8 + SLL %r3, 20 + + # is ILC == 3? + LGH %r2,0x8C + CGHI %r2,0x0006 + BNE ERR + + # grab the old PSW address, subtract length of TPROT, and compare it + # with the TPROT opcode (0xe501) + LG %r1,0x158 + AGHI %r1,-6 + LLGH %r2,TPROTOP(%r3) + LLGH %r1,0(%r1) + CGR %r2,%r1 + BNE ERR(%r3) + + # set CC=3 + OI 0x152,0x30 + + LMG %r1,%r3,0x200 + + LPSWE 0x150 + +ERR: +.byte 0x00, 0x00 + + +# +# Useful data +# +.data +.globl TPROTOP +TPROTOP: +.byte 0xe5, 0x01 + + .align 8 +.globl IOPSW +IOPSW: + .byte 0x00 + # bits value name desc + # 0 0 <zero> + # 1 0 PER Mask (R) disabled + # 2-4 0 <zero> + # 5 0 DAT Mode (T) disabled + # 6 0 I/O Mask (IO) enabled + # 7 0 External Mask (EX) disabled + + .byte 0x00 + # bits value name desc + # 8-11 0 Key + # 12 0 <one> + # 13 0 Machine-Check Mask (M) disabled + # 14 0 Wait State (W) executing + # 15 0 Problem State (P) supervisor state + + .byte 0x00 + # bits value name desc + # 16-17 0 Address-Space Control (AS) disabled + # 18-19 0 Condition Code (CC) + # 20-23 0 Program Mask exceptions disabled + + .byte 0x01 + # bits value name desc + # 24-30 0 <zero> + # 31 1 Extended Addressing (EA) EA + BA = 64 mode + + .byte 0x80 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + # bits value name desc + # 32 1 Basic Addressing (BA) BA = 31, !BA = 24 + # 33-63 0 <zero> + # 64-127 addr Instruction Address Address to exec + +.globl WAITPSW +WAITPSW: + .byte 0x02 + # bits value name desc + # 0 0 <zero> + # 1 0 PER Mask (R) disabled + # 2-4 0 <zero> + # 5 0 DAT Mode (T) disabled + # 6 1 I/O Mask (IO) enabled + # 7 0 External Mask (EX) disabled + + .byte 0x02 + # bits value name desc + # 8-11 0 Key + # 12 0 <zero> + # 13 0 Machine-Check Mask (M) disabled + # 14 1 Wait State (W) not executing + # 15 0 Problem State (P) supervisor state + + .byte 0x00 + # bits value name desc + # 16-17 0 Address-Space Control (AS) disabled + # 18-19 0 Condition Code (CC) + # 20-23 0 Program Mask exceptions disabled + + .byte 0x01 + # bits value name desc + # 24-30 0 <zero> + # 31 1 Extended Addressing (EA) EA + BA = 64 mode + + .byte 0x80 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + .byte 0x00 + # bits value name desc + # 32 1 Basic Addressing (BA) BA = 31, !BA = 24 + # 33-63 0 <zero> + # 64-127 addr Instruction Address Address to exec + +.globl TMPVAR +TMPVAR: + .8byte 0x0 + +.globl ADDRMASK +ADDRMASK: + .4byte 0x7fffffff + +.globl MAGICVAL +MAGICVAL: + .4byte 0x12345678 + +.globl IRB +IRB: + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 + .8byte 0x00 +
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/ipl/setmode.S Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,46 @@ +# +# At this point, the machine is running in ESA390 mode. Let's load a new +# PSW, making it switch to 64-bit mode +# + + # switch to 64-bit mode + # + # Signal Processor + # Order 0x12: Set Architecture + # R1 bits 56-63 = 0x01 (switch all CPUs to z/Arch) + SR %r1, %r1 + LHI %r1, 0x1 # switch all to z/Arch + SR %r3, %r3 # CPU Address (CPU0000) + SIGP %r1, %r3, 0x12 # Signal, order 0x12 + SAM64 + # On error: + # Bit 55 = 1, cc1 (inval param) + # Bit 54 = 1, cc1 (incorrect state) + + # FIXME: check for errors? + +# +# At this point, we should be in 64-bit mode +# + + # + # It is unfortunate that the below code is required. + # + # Let's set the stack pointer to make gcc happy + # + # A standard stack frame is 160 bytes + # + + # r15 = 0x100000 + # = (1 << 20) + # + SR %r15, %r15 + LHI %r15, 0x1 + SLL %r15, 20 + AHI %r15, -160 + +# +# Padding to make the entire file 0x20 bytes +# + BCR 0, %r7 + BCR 0, %r7
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/scripts/gen_ccws.sh Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,42 @@ +#!/bin/bash + +len=`stat -c %s ipl/setmode.rto` +len=`expr $len + $(stat -c %s ipl/loader.rto)` +dif=`expr $len % 80` + +if [ $dif -ne 0 ]; then + len=`expr $len - $dif` + len=`expr $len + 80` +fi + +len=`expr $len \/ 80` + +# 13 CCWs * 80 bytes/ccw = 1040 bytes +if [ $len -gt 13 ]; then + echo "ERROR: loader code is too long ($len CCWs needed)" >&2 + exit 1 +fi + +echo -n "" > "$1" + +addr=8388608 # == 0x800000 +flags="0x60" +for x in `seq 1 $len`; do + high_addr=`expr $addr \/ 65536` + mid_addr=`expr $(expr $addr \/ 256) % 256` + low_addr=`expr $addr % 256` + + [ $x -eq $len ] && flags="0x20" + + echo "# CCW $x" >> "$1" + echo " .byte 0x02, $high_addr, $mid_addr, $low_addr" >> "$1" + echo " .byte $flags, 0x00, 0x00, 0x50" >> "$1" + echo "" >> "$1" + + addr=`expr $addr + 80` +done + +echo "# pad" >> "$1" +for x in `seq $len 19`; do + echo " .byte 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40" >> "$1" +done
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/scripts/linker.script Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,8 @@ +SECTIONS +{ + ENTRY(start) + . = 0x100000; + .text : { *(.text) } + .data : { *(.data) } + .bss : { *(.bss) } +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/init.c Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,10 @@ +/* + * This is where everything starts + */ +void start(u64 __memsize) +{ + putline("Hello\n", 6); + + for(;;) + ; +}
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/src/io.c Thu Feb 24 23:04:37 2011 -0500 @@ -0,0 +1,577 @@ +/* + * Tables taken from Linux's arch/s390/kernel/ebcdic.c + */ + +/* + * ASCII (IBM PC 437) -> EBCDIC 037 + */ +static u8 ascii2ebcdic_table[256] = +{ + /*00 NUL SOH STX ETX EOT ENQ ACK BEL */ + 0x00, 0x01, 0x02, 0x03, 0x37, 0x2D, 0x2E, 0x2F, + /*08 BS HT LF VT FF CR SO SI */ + /* ->NL */ + 0x16, 0x05, 0x15, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + /*10 DLE DC1 DC2 DC3 DC4 NAK SYN ETB */ + 0x10, 0x11, 0x12, 0x13, 0x3C, 0x3D, 0x32, 0x26, + /*18 CAN EM SUB ESC FS GS RS US */ + /* ->IGS ->IRS ->IUS */ + 0x18, 0x19, 0x3F, 0x27, 0x22, 0x1D, 0x1E, 0x1F, + /*20 SP ! " # $ % & ' */ + 0x40, 0x5A, 0x7F, 0x7B, 0x5B, 0x6C, 0x50, 0x7D, + /*28 ( ) * + , - . / */ + 0x4D, 0x5D, 0x5C, 0x4E, 0x6B, 0x60, 0x4B, 0x61, + /*30 0 1 2 3 4 5 6 7 */ + 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, + /*38 8 9 : ; < = > ? */ + 0xF8, 0xF9, 0x7A, 0x5E, 0x4C, 0x7E, 0x6E, 0x6F, + /*40 @ A B C D E F G */ + 0x7C, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, + /*48 H I J K L M N O */ + 0xC8, 0xC9, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, + /*50 P Q R S T U V W */ + 0xD7, 0xD8, 0xD9, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, + /*58 X Y Z [ \ ] ^ _ */ + 0xE7, 0xE8, 0xE9, 0xBA, 0xE0, 0xBB, 0xB0, 0x6D, + /*60 ` a b c d e f g */ + 0x79, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, + /*68 h i j k l m n o */ + 0x88, 0x89, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, + /*70 p q r s t u v w */ + 0x97, 0x98, 0x99, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, + /*78 x y z { | } ~ DL */ + 0xA7, 0xA8, 0xA9, 0xC0, 0x4F, 0xD0, 0xA1, 0x07, + /*80*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*88*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*90*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*98*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*A0*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*A8*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*B0*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*B8*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*C0*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*C8*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*D0*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*D8*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*E0 sz */ + 0x3F, 0x59, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*E8*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*F0*/ + 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, 0x3F, + /*F8*/ + 0x90, 0x3F, 0x3F, 0x3F, 0x3F, 0xEA, 0x3F, 0xFF +}; + +/* + * EBCDIC 037 -> ASCII (IBM PC 437) + */ +u8 ebcdic2ascii_table[256] = +{ + /* 0x00 NUL SOH STX ETX *SEL HT *RNL DEL */ + 0x00, 0x01, 0x02, 0x03, 0x07, 0x09, 0x07, 0x7F, + /* 0x08 -GE -SPS -RPT VT FF CR SO SI */ + 0x07, 0x07, 0x07, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, + /* 0x10 DLE DC1 DC2 DC3 -RES -NL BS -POC + -ENP ->LF */ + 0x10, 0x11, 0x12, 0x13, 0x07, 0x0A, 0x08, 0x07, + /* 0x18 CAN EM -UBS -CU1 -IFS -IGS -IRS -ITB + -IUS */ + 0x18, 0x19, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + /* 0x20 -DS -SOS FS -WUS -BYP LF ETB ESC + -INP */ + 0x07, 0x07, 0x1C, 0x07, 0x07, 0x0A, 0x17, 0x1B, + /* 0x28 -SA -SFE -SM -CSP -MFA ENQ ACK BEL + -SW */ + 0x07, 0x07, 0x07, 0x07, 0x07, 0x05, 0x06, 0x07, + /* 0x30 ---- ---- SYN -IR -PP -TRN -NBS EOT */ + 0x07, 0x07, 0x16, 0x07, 0x07, 0x07, 0x07, 0x04, + /* 0x38 -SBS -IT -RFF -CU3 DC4 NAK ---- SUB */ + 0x07, 0x07, 0x07, 0x07, 0x14, 0x15, 0x07, 0x1A, + /* 0x40 SP RSP ä ---- */ + 0x20, 0xFF, 0x83, 0x84, 0x85, 0xA0, 0x07, 0x86, + /* 0x48 . < ( + | */ + 0x87, 0xA4, 0x9B, 0x2E, 0x3C, 0x28, 0x2B, 0x7C, + /* 0x50 & ---- */ + 0x26, 0x82, 0x88, 0x89, 0x8A, 0xA1, 0x8C, 0x07, + /* 0x58 ß ! $ * ) ; */ + 0x8D, 0xE1, 0x21, 0x24, 0x2A, 0x29, 0x3B, 0xAA, + /* 0x60 - / ---- Ä ---- ---- ---- */ + 0x2D, 0x2F, 0x07, 0x8E, 0x07, 0x07, 0x07, 0x8F, + /* 0x68 ---- , % _ > ? */ + 0x80, 0xA5, 0x07, 0x2C, 0x25, 0x5F, 0x3E, 0x3F, + /* 0x70 ---- ---- ---- ---- ---- ---- ---- */ + 0x07, 0x90, 0x07, 0x07, 0x07, 0x07, 0x07, 0x07, + /* 0x78 * ` : # @ ' = " */ + 0x70, 0x60, 0x3A, 0x23, 0x40, 0x27, 0x3D, 0x22, + /* 0x80 * a b c d e f g */ + 0x07, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, + /* 0x88 h i ---- ---- ---- */ + 0x68, 0x69, 0xAE, 0xAF, 0x07, 0x07, 0x07, 0xF1, + /* 0x90 ° j k l m n o p */ + 0xF8, 0x6A, 0x6B, 0x6C, 0x6D, 0x6E, 0x6F, 0x70, + /* 0x98 q r ---- ---- */ + 0x71, 0x72, 0xA6, 0xA7, 0x91, 0x07, 0x92, 0x07, + /* 0xA0 ~ s t u v w x */ + 0xE6, 0x7E, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, + /* 0xA8 y z ---- ---- ---- ---- */ + 0x79, 0x7A, 0xAD, 0xAB, 0x07, 0x07, 0x07, 0x07, + /* 0xB0 ^ ---- § ---- */ + 0x5E, 0x9C, 0x9D, 0xFA, 0x07, 0x07, 0x07, 0xAC, + /* 0xB8 ---- [ ] ---- ---- ---- ---- */ + 0xAB, 0x07, 0x5B, 0x5D, 0x07, 0x07, 0x07, 0x07, + /* 0xC0 { A B C D E F G */ + 0x7B, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, + /* 0xC8 H I ---- ö ---- */ + 0x48, 0x49, 0x07, 0x93, 0x94, 0x95, 0xA2, 0x07, + /* 0xD0 } J K L M N O P */ + 0x7D, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, + /* 0xD8 Q R ---- ü */ + 0x51, 0x52, 0x07, 0x96, 0x81, 0x97, 0xA3, 0x98, + /* 0xE0 \ S T U V W X */ + 0x5C, 0xF6, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, + /* 0xE8 Y Z ---- Ö ---- ---- ---- */ + 0x59, 0x5A, 0xFD, 0x07, 0x99, 0x07, 0x07, 0x07, + /* 0xF0 0 1 2 3 4 5 6 7 */ + 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, + /* 0xF8 8 9 ---- ---- Ü ---- ---- ---- */ + 0x38, 0x39, 0x07, 0x07, 0x9A, 0x07, 0x07, 0x07 +}; + +/* + * Generic translate buffer function. + */ +static inline void __translate(u8 *buf, int len, const u8 *table) +{ + asm volatile( + " sr %%r0,%%r0\n" /* test byte = 0 */ + " la %%r2,0(%0)\n" /* buffer */ + " lr %%r3,%2\n" /* length */ + " la %%r4,0(%1)\n" /* table */ + " tre %%r2,%%r4\n" + : /* output */ + : /* input */ + "a" (buf), + "a" (table), + "d" (len) + : /* clobbered */ + "cc", "r0", "r2", "r3", "r4" + ); +} + +#define ascii2ebcdic(buf, len) \ + __translate((buf), (len), ascii2ebcdic_table) +#define ebcdic2ascii(buf, len) \ + __translate((buf), (len), ebcdic2ascii_table) + +/* console I/O functions */ + +#define CON_LEN 132 +#define CON_DEV 0x0009 + +struct pmcw { + /* word 0 */ + u32 interrupt_param; /* Interruption Parameter */ + + /* word 1*/ + u8 __zero1:2, + isc:3, /* I/O-Interruption-Subclass Code */ + __zero2:3; + u8 e:1, /* Enabled */ + lm:2, /* Limit Mode */ + mm:2, /* Measurement-Mode Enable */ + d:1, /* Multipath Mode */ + t:1, /* Timing Facility */ + v:1; /* Device Number Valid */ + u16 dev_num; /* Device Number */ + + /* word 2 */ + u8 lpm; /* Logical-Path Mask */ + u8 pnom; /* Path-Not-Operational Mask */ + u8 lpum; /* Last-Path-Used Mask */ + u8 pim; /* Path-Installed Mask */ + + /* word 3 */ + u16 mbi; /* Measurement-Block Index */ + u8 pom; /* Path-Operational Mask */ + u8 pam; /* Path-Available Mask */ + + /* word 4 & 5 */ + u8 chpid[8]; /* Channel-Path Identifiers */ + + /* word 6 */ + u16 __zero3; + u16 __zero4:13, + f:1, /* Measurement Block Format Control */ + x:1, /* Extended Measurement Word Mode Enable */ + s:1; /* Concurrent Sense */ +}; + +struct scsw { + /* word 0 */ + u16 key:4, /* Subchannel key */ + s:1, /* Suspend control */ + l:1, /* ESW format */ + cc:2, /* Deferred condition code */ + f:1, /* Format */ + p:1, /* Prefetch */ + i:1, /* Initial-status interruption control */ + a:1, /* Address-limit-checking control */ + u:1, /* Supress-suspended interruption */ + z:1, /* Zero condition code */ + e:1, /* Extended control */ + n:1; /* Path no operational */ + u16 __zero:1, + fc:3, /* Function control */ + ac:8, /* Activity control */ + sc:4; /* Status control */ + + /* word 1 */ + u32 addr; /* CCW Address */ + + /* word 2 */ + u8 dev_status; /* Device status */ + u8 sch_status; /* Subchannel status */ + u16 count; /* Count */ +} __attribute__((packed)); + +struct schib { + struct pmcw pmcw; /* Path Management Control Word */ + struct scsw scsw; /* Subchannel Status Word */ + u32 measure_block_1; + u32 measure_block_2; + u32 model_dep_area; +} __attribute__((packed,aligned(4))); + +struct orb { + /* word 0 */ + u32 param; /* Interruption Parameter */ + + /* word 1 */ + u8 key:4, /* Subchannel Key */ + s:1, /* Suspend */ + c:1, /* Streaming-Mode Control */ + m:1, /* Modification Control */ + y:1; /* Synchronization Control */ + u8 f:1, /* Format Control */ + p:1, /* Prefetch Control */ + i:1, /* Initial-Status-Interruption Control */ + a:1, /* Address-Limit-Checking control */ + u:1, /* Suppress-Suspend-Interruption Control */ + __zero1:1, + h:1, /* Format-2-IDAW Control */ + t:1; /* 2K-IDAW Control */ + u8 lpm; /* Logical-Path Mask */ + u8 l:1, /* Incorrect-Length-Suppression Mode */ + d:1, /* Modified-CCW-Indirect-Data-Addressing Control */ + __zero2:5, + x:1; /* ORB-Extension Control */ + + /* word 2 */ + u32 addr; /* Channel-Program Address */ + + /* word 3 */ + u8 css_prio; /* Channel-Subsystem Priority */ + u8 __reserved1; + u8 cu_prio; /* Control-Unit Priority */ + u8 __reserved2; + + /* word 4 - 7 */ + u32 __reserved3; + u32 __reserved4; + u32 __reserved5; + u32 __reserved6; +} __attribute__((packed,aligned(4))); + +struct ccw { + u8 cmd; /* Command code */ + u8 flags; /* Flags */ + u16 count; /* Count */ + u32 addr; /* Data Address */ +} __attribute__((packed,aligned(8))); + +struct psw { + u8 _zero0:1, + r:1, /* PER Mask (R) */ + _zero1:3, + t:1, /* DAT Mode (T) */ + io:1, /* I/O Mask (IO) */ + ex:1; /* External Mask (EX) */ + + u8 key:4, /* Key */ + _zero2:1, + m:1, /* Machine-Check Mask (M) */ + w:1, /* Wait State (W) */ + p:1; /* Problem State (P) */ + + u8 as:2, /* Address-Space Control (AS) */ + cc:2, /* Condition Code (CC) */ + prog_mask:4; /* Program Mask */ + + u8 _zero3:7, + ea:1; /* Extended Addressing (EA) */ + + u32 ba:1, /* Basic Addressing (BA) */ + _zero4:31; + + u64 ptr; +}; + +struct irb { + struct scsw scsw; /* Subchannel-Status */ + u32 w0a, w1a, w2a, w3a, w4a; + u32 w0b, w1b, w2b, w3b, w4b, w5b, w6b, w7b; + u32 w0c, w1c, w2c, w3c, w4c, w5c, w6c, w7c; +} __attribute__((packed,aligned(4))); + +static int init_cons; +static u32 consch; + +static struct irb irb; +static struct orb orb; +static struct ccw ccw; + +static inline int store_sch(u32 sch, struct schib *schib) +{ + int cc; + + asm volatile( + "lr %%r1,%2\n" + "stsch %1\n" + "ipm %0\n" + "srl %0,28\n" + : /* output */ + "=d" (cc), + "=Q" (*schib) + : /* input */ + "d" (sch) + : /* clobbered */ + "cc", "r1", "memory" + ); + + return cc; +} + +static inline int modify_sch(u32 sch, struct schib *schib) +{ + int cc; + + asm volatile( + "lr %%r1,%1\n" + "msch 0(%2)\n" + "ipm %0\n" + "srl %0,28\n" + : /* output */ + "=d" (cc) + : /* input */ + "d" (sch), + "a" (schib) + : /* clobbered */ + "cc", "r1" + ); + + return cc; +} + +static inline int start_sch(u32 sch, struct orb *orb) +{ + int cc; + + asm volatile( + " lr %%r1,%1\n" + " ssch 0(%2)\n" + " ipm %0\n" + " srl %0,28\n" + : /* output */ + "=d" (cc) + : /* input */ + "d" (sch), + "a" (orb) + : /* clobbered */ + "cc", "r1" + ); + + return cc; +} + +#define die() do { \ + asm volatile( \ + "SR %r1, %r1 # not used, but should be zero\n" \ + "SR %r3, %r3 # CPU Address\n" \ + "SIGP %r1, %r3, 0x05 # Signal, order 0x05\n" \ + ); \ + for(;;); \ + } while(0) + +static void enable_cons(int devnum) +{ + struct psw psw; + struct schib schib; + u32 sch; + + for(sch=0x10000; sch<=0x1ffff; sch++) { + if (store_sch(sch, &schib)) + continue; + + if (!schib.pmcw.v) + continue; + + if (schib.pmcw.dev_num != devnum) + continue; + + schib.pmcw.e = 1; + + if (modify_sch(sch, &schib)) + continue; + + // found it + init_cons = 1; + consch = sch; + + // set up the IO interrupt handler + psw.ea = 1; + psw.ba = 1; + + asm volatile( + " larl %%r1,0f\n" + " stg %%r1,%0\n" + " brc 15,1f\n" + /* IO handler code begins */ + "0:\n" + " l %%r1,0xb8\n" + " larl %%r2,irb\n" + " tsch 0(%%r2)\n" + " l %%r1,5(%%r2)\n" + " nill %%r1,0x04\n" + " brc 8,2f\n" // done? + " lg %%r1,0x178\n" // yes. + " bcr 15,%%r1\n" + "2:\n" + " l %%r1,5(%%r2)\n" + " nill %%r1,0x80\n" + " brc 8,3f\n" // attention? + " lg %%r1,0x178\n" // yes. + " bcr 15,%%r1\n" + "3:\n" + " lpswe 0x170\n" + /* IO handler code ends */ + "1:\n" + : /* output */ + "=m" (psw.ptr), + "=m" (irb) + : /* input */ + "a" (&irb) + : /* clobbered */ + "r1", "r2" + ); + + __builtin_memcpy(((void*) 0x1f0), &psw, sizeof(struct psw)); + + return; + } + + die(); +} + +static inline void wait_for_io_int() +{ + struct psw psw; + + __builtin_memset(&psw, 0, sizeof(struct psw)); + psw.io = 1; + psw.ea = 1; + psw.ba = 1; + psw.w = 1; + + asm volatile( + " larl %%r1,0f\n" + " stg %%r1,%0\n" + " lpswe %1\n" + "0:\n" + : /* output */ + "=m" (psw.ptr) + : /* input */ + "m" (psw) + : /* clobbered */ + "r1", "r2" + ); +} + +int putline(char *buf, int len) +{ + char data[CON_LEN]; + + if (!init_cons) + enable_cons(CON_DEV); + + if ((len <= 0) || (len > CON_LEN)) + return -1; + + __builtin_memcpy(data, buf, len); + ascii2ebcdic((u8*) data, len); + + ccw.cmd = 0x01; + ccw.flags = 0; + ccw.count = len; + ccw.addr = (u32) (u64) data; + + __builtin_memset(&orb, 0, sizeof(struct orb)); + orb.lpm = 0xff; + orb.addr = (u32) (u64) &ccw; + orb.f = 1; + + if (start_sch(consch, &orb)) + die(); + + wait_for_io_int(); + + return len; +} + +int getline(char *buf, int len) +{ + if (!init_cons) + enable_cons(CON_DEV); + + if ((len <= 0) || (len > CON_LEN)) + return -1; + + wait_for_io_int(); + + __builtin_memset(buf, 0, CON_LEN); + ccw.cmd = 0x0a; + ccw.flags = 0x20; + ccw.count = len; + ccw.addr = (u32) (u64) buf; + + __builtin_memset(&orb, 0, sizeof(struct orb)); + orb.lpm = 0xff; + orb.addr = (u32) (u64) &ccw; + orb.f = 1; + + if (start_sch(consch, &orb)) + die(); + + wait_for_io_int(); + + for(len=0; len<CON_LEN; len++) + if (!buf[len]) + break; + + if (len) + ebcdic2ascii((u8*) buf, len); + + return len; +}