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changeset 19201:3b8becb32af2

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11799 rootnex: cast between incompatible function types Reviewed by: Robert Mustacchi <rm@fingolfin.org> Approved by: Dan McDonald <danmcd@joyent.com>
author Toomas Soome <tsoome@me.com>
date Wed, 21 Nov 2018 20:18:17 +0200
parents 9a74cf4d90f0
children 908a1212c523
files usr/src/uts/i86pc/io/immu_intrmap.c usr/src/uts/i86pc/io/immu_regs.c usr/src/uts/i86pc/sys/immu.h
diffstat 3 files changed, 18 insertions(+), 17 deletions(-) [+]
line wrap: on
line diff
--- a/usr/src/uts/i86pc/io/immu_intrmap.c	Sun Oct 21 22:48:51 2018 +0300
+++ b/usr/src/uts/i86pc/io/immu_intrmap.c	Wed Nov 21 20:18:17 2018 +0200
@@ -63,7 +63,7 @@
 	    (p))
 
 typedef enum {
-	SVT_NO_VERIFY = 0, 	/* no verification */
+	SVT_NO_VERIFY = 0,	/* no verification */
 	SVT_ALL_VERIFY,		/* using sid and sq to verify */
 	SVT_BUS_VERIFY,		/* verify #startbus and #endbus */
 	SVT_RSVD
@@ -224,7 +224,7 @@
 		}
 	}
 
-	return (INTRMAP_IDX_FULL);  		/* no free index */
+	return (INTRMAP_IDX_FULL);		/* no free index */
 }
 
 /* alloc one interrupt remapping table entry */
@@ -495,11 +495,12 @@
 
 /*
  * immu_intr_handler()
- * 	the fault event handler for a single immu unit
+ *	the fault event handler for a single immu unit
  */
-int
-immu_intr_handler(immu_t *immu)
+uint_t
+immu_intr_handler(caddr_t arg, caddr_t arg1 __unused)
 {
+	immu_t *immu = (immu_t *)arg;
 	uint32_t status;
 	int index, fault_reg_offset;
 	int max_fault_index;
@@ -995,10 +996,10 @@
 	    "%s-intr-handler", immu->immu_name);
 
 	(void) add_avintr((void *)NULL, IMMU_INTR_IPL,
-	    (avfunc)(immu_intr_handler), intr_handler_name, irq,
+	    immu_intr_handler, intr_handler_name, irq,
 	    (caddr_t)immu, NULL, NULL, NULL);
 
 	immu_regs_intr_enable(immu, msi_addr, msi_data, uaddr);
 
-	(void) immu_intr_handler(immu);
+	(void) immu_intr_handler((caddr_t)immu, NULL);
 }
--- a/usr/src/uts/i86pc/io/immu_regs.c	Sun Oct 21 22:48:51 2018 +0300
+++ b/usr/src/uts/i86pc/io/immu_regs.c	Wed Nov 21 20:18:17 2018 +0200
@@ -253,7 +253,7 @@
 
 /*
  * set_immu_agaw()
- * 	calculate agaw for a IOMMU unit
+ *	calculate agaw for a IOMMU unit
  */
 static int
 set_agaw(immu_t *immu)
@@ -481,7 +481,7 @@
 	immu_regs_intr_enable(immu, immu->immu_regs_intr_msi_addr,
 	    immu->immu_regs_intr_msi_data, immu->immu_regs_intr_uaddr);
 
-	(void) immu_intr_handler(immu);
+	(void) immu_intr_handler((caddr_t)immu, NULL);
 
 	immu_regs_intrmap_enable(immu, immu->immu_intrmap_irta_reg);
 
@@ -638,7 +638,7 @@
 
 /*
  * immu_regs_cpu_flush()
- * 	flush the cpu cache line after CPU memory writes, so
+ *	flush the cpu cache line after CPU memory writes, so
  *      IOMMU can see the writes
  */
 void
--- a/usr/src/uts/i86pc/sys/immu.h	Sun Oct 21 22:48:51 2018 +0300
+++ b/usr/src/uts/i86pc/sys/immu.h	Wed Nov 21 20:18:17 2018 +0200
@@ -130,11 +130,11 @@
 	kmutex_t	dr_lock;   /* protects the dmar field */
 	struct immu	*dr_immu;
 	dev_info_t	*dr_dip;
-	uint16_t 	dr_seg;
-	uint64_t 	dr_regs;
+	uint16_t	dr_seg;
+	uint64_t	dr_regs;
 	boolean_t	dr_include_all;
-	list_t 		dr_scope_list;
-	list_node_t 	dr_node;
+	list_t		dr_scope_list;
+	list_node_t	dr_node;
 } drhd_t;
 
 typedef struct rmrr {
@@ -638,7 +638,7 @@
  * Enough space to hold the decimal number of any device instance.
  * Used for device/cache names.
  */
-#define	IMMU_ISTRLEN 	11	/* log10(2^31)  + 1 */
+#define	IMMU_ISTRLEN	11	/* log10(2^31)  + 1 */
 
 /* properties that control DVMA */
 #define	DDI_DVMA_MAPTYPE_ROOTNEX_PROP	"immu-dvma-mapping"
@@ -677,7 +677,7 @@
 	/* list node for list of domains off immu */
 	list_node_t		dom_immu_node;
 
-	mod_hash_t 		*dom_cookie_hash;
+	mod_hash_t		*dom_cookie_hash;
 
 	/* topmost device in domain; usually the device itself (non-shared) */
 	dev_info_t		*dom_dip;
@@ -944,7 +944,7 @@
 
 /* registers interrupt handler for IOMMU unit */
 void immu_intr_register(immu_t *immu);
-int immu_intr_handler(immu_t *immu);
+uint_t immu_intr_handler(caddr_t, caddr_t);
 
 
 /* immu_qinv.c interfaces */