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changeset 25600:37aafd26785f

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13218 "Stack smashing detected" panic when creating vnic over aggr with 4 mlxcx links 13222 Increase maximum number of fanout CPUs from 128 to 256 Reviewed by: Robert Mustacchi <rm@fingolfin.org> Reviewed by: Garrett D'Amore <garrett@damore.org> Approved by: Dan McDonald <danmcd@joyent.com>
author Paul Winder <paul@winder.uk.net>
date Tue, 13 Oct 2020 14:36:54 +0100
parents 2382a653be35
children 4e595fb950c6 9a84eaebcbd2
files usr/src/uts/common/io/mac/mac_datapath_setup.c usr/src/uts/common/sys/mac_flow.h
diffstat 2 files changed, 33 insertions(+), 33 deletions(-) [+]
line wrap: on
line diff
--- a/usr/src/uts/common/io/mac/mac_datapath_setup.c	Sat Dec 12 00:38:47 2020 +0000
+++ b/usr/src/uts/common/io/mac/mac_datapath_setup.c	Tue Oct 13 14:36:54 2020 +0100
@@ -21,6 +21,7 @@
 /*
  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
  * Copyright 2018 Joyent, Inc.
+ * Copyright 2020 RackTop Systems.
  */
 
 #include <sys/types.h>
@@ -1072,10 +1073,9 @@
 {
 	mac_soft_ring_set_t *rx_srs;
 	processorid_t cpuid;
-	int i, j, k, srs_cnt, nscpus, maxcpus, soft_ring_cnt = 0;
+	int i, j, k, srs_cnt, maxcpus, soft_ring_cnt = 0;
 	mac_cpus_t *srs_cpu;
 	mac_resource_props_t *emrp = &flent->fe_effective_props;
-	uint32_t cpus[MRP_NCPUS];
 
 	/*
 	 * The maximum number of CPUs available can either be
@@ -1083,6 +1083,12 @@
 	 * in the system.
 	 */
 	maxcpus = (cpupart != NULL) ? cpupart->cp_ncpus : ncpus;
+	/*
+	 * We cannot exceed the hard limit imposed by data structures.
+	 * Leave space for polling CPU and the SRS worker thread when
+	 * "mac_latency_optimize" is not set.
+	 */
+	maxcpus = MIN(maxcpus, MRP_NCPUS - 2);
 
 	/*
 	 * Compute the number of soft rings needed on top for each Rx
@@ -1102,7 +1108,10 @@
 		 */
 		soft_ring_cnt = 1;
 	}
-	for (srs_cnt = 0; srs_cnt < flent->fe_rx_srs_cnt; srs_cnt++) {
+
+	emrp->mrp_ncpus = 0;
+	for (srs_cnt = 0; srs_cnt < flent->fe_rx_srs_cnt &&
+	    emrp->mrp_ncpus < MRP_NCPUS; srs_cnt++) {
 		rx_srs = flent->fe_rx_srs[srs_cnt];
 		srs_cpu = &rx_srs->srs_cpu;
 		if (rx_srs->srs_fanout_state == SRS_FANOUT_INIT)
@@ -1129,33 +1138,23 @@
 		}
 		srs_cpu->mc_rx_workerid = cpuid;
 		mutex_exit(&cpu_lock);
-	}
-
-	nscpus = 0;
-	for (srs_cnt = 0; srs_cnt < flent->fe_rx_srs_cnt; srs_cnt++) {
-		rx_srs = flent->fe_rx_srs[srs_cnt];
-		srs_cpu = &rx_srs->srs_cpu;
-		for (j = 0; j < srs_cpu->mc_ncpus; j++) {
-			cpus[nscpus++] = srs_cpu->mc_cpus[j];
+
+		/*
+		 * Copy fanout CPUs to fe_effective_props without duplicates.
+		 */
+		for (i = 0; i < srs_cpu->mc_ncpus &&
+		    emrp->mrp_ncpus < MRP_NCPUS; i++) {
+			for (j = 0; j < emrp->mrp_ncpus; j++) {
+				if (emrp->mrp_cpu[j] == srs_cpu->mc_cpus[i])
+					break;
+			}
+			if (j == emrp->mrp_ncpus) {
+				emrp->mrp_cpu[emrp->mrp_ncpus++] =
+				    srs_cpu->mc_cpus[i];
+			}
 		}
 	}
 
-
-	/*
-	 * Copy cpu list to fe_effective_props
-	 * without duplicates.
-	 */
-	k = 0;
-	for (i = 0; i < nscpus; i++) {
-		for (j = 0; j < k; j++) {
-			if (emrp->mrp_cpu[j] == cpus[i])
-				break;
-		}
-		if (j == k)
-			emrp->mrp_cpu[k++] = cpus[i];
-	}
-	emrp->mrp_ncpus = k;
-
 	mac_tx_cpu_init(flent, NULL, cpupart);
 }
 
--- a/usr/src/uts/common/sys/mac_flow.h	Sat Dec 12 00:38:47 2020 +0000
+++ b/usr/src/uts/common/sys/mac_flow.h	Tue Oct 13 14:36:54 2020 +0100
@@ -23,6 +23,7 @@
  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  * Use is subject to license terms.
  * Copyright 2013 Joyent, Inc.  All rights reserved.
+ * Copyright 2020 RackTop Systems, Inc.
  */
 
 #ifndef	_MAC_FLOW_H
@@ -92,7 +93,7 @@
 	uint8_t				fd_dsfield_mask;
 } flow_desc_t;
 
-#define	MRP_NCPUS	128
+#define	MRP_NCPUS	256
 
 /*
  * In MCM_CPUS mode, cpu bindings is user specified. In MCM_FANOUT mode,
@@ -118,7 +119,7 @@
 
 typedef struct mac_cpus_props_s {
 	uint32_t		mc_ncpus;		/* num of cpus */
-	uint32_t		mc_cpus[MRP_NCPUS]; 	/* cpu list */
+	uint32_t		mc_cpus[MRP_NCPUS];	/* cpu list */
 	uint32_t		mc_rx_fanout_cnt;	/* soft ring cpu cnt */
 	uint32_t		mc_rx_fanout_cpus[MRP_NCPUS]; /* SR cpu list */
 	uint32_t		mc_rx_pollid;		/* poll thr binding */
@@ -188,10 +189,10 @@
 /* The default priority for flows */
 #define	MPL_SUBFLOW_DEFAULT		MPL_MEDIUM
 
-#define	MRP_MAXBW		0x00000001 	/* Limit set */
-#define	MRP_CPUS		0x00000002 	/* CPU/fanout set */
-#define	MRP_CPUS_USERSPEC	0x00000004 	/* CPU/fanout from user */
-#define	MRP_PRIORITY		0x00000008 	/* Priority set */
+#define	MRP_MAXBW		0x00000001	/* Limit set */
+#define	MRP_CPUS		0x00000002	/* CPU/fanout set */
+#define	MRP_CPUS_USERSPEC	0x00000004	/* CPU/fanout from user */
+#define	MRP_PRIORITY		0x00000008	/* Priority set */
 #define	MRP_PROTECT		0x00000010	/* Protection set */
 #define	MRP_RX_RINGS		0x00000020	/* Rx rings */
 #define	MRP_TX_RINGS		0x00000040	/* Tx rings */