illumos/illumos-gate: usr/src/uts/i86pc/os/cpupm/speedstep.c annotate

annotate usr/src/uts/i86pc/os/cpupm/speedstep.c @ 14169:ae5fcf7b2a38

4048 cpu_acpi is too verbose about disabled SpeedStep/PowerNow! support Reviewed by: Albert Lee <trisk@nexenta.com> Reviewed by: Garrett D'Amore <garrett@damore.org> Approved by: Dan McDonald <danmcd@nexenta.com>

author	Yuri Pankov <yuri.pankov@nexenta.com>
date	Thu, 29 Aug 2013 02:06:39 +0400
parents	1905bad7dc63
children

rev	line source
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	1 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	2 * CDDL HEADER START
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	3 *
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	4 * The contents of this file are subject to the terms of the
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	5 * Common Development and Distribution License (the "License").
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	6 * You may not use this file except in compliance with the License.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	7 *
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	9 * or http://www.opensolaris.org/os/licensing.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	10 * See the License for the specific language governing permissions
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	11 * and limitations under the License.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	12 *
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	13 * When distributing Covered Code, include this CDDL HEADER in each
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	15 * If applicable, add the following below this CDDL HEADER, with the
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	16 * fields enclosed by brackets "[]" replaced with your own identifying
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	17 * information: Portions Copyright [yyyy] [name of copyright owner]
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	18 *
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	19 * CDDL HEADER END
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	20 */
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	21 /*
12838 fca99d9e3f2f 6812663 Running out of bits in x86_feature Kuriakose Kuruvilla <kuriakose.kuruvilla@oracle.com> parents: 10488 diff changeset	22 * Copyright (c) 2007, 2010, Oracle and/or its affiliates. All rights reserved.
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	23 */
10488 296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	24 /*
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	25 * Copyright (c) 2009, Intel Corporation.
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	26 * All Rights Reserved.
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	27 */
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	28
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	29 #include <sys/x86_archext.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	30 #include <sys/machsystm.h>
8935 5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	31 #include <sys/archsystm.h>
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	32 #include <sys/x_call.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	33 #include <sys/acpi/acpi.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	34 #include <sys/acpica.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	35 #include <sys/speedstep.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	36 #include <sys/cpu_acpi.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	37 #include <sys/cpupm.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	38 #include <sys/dtrace.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	39 #include <sys/sdt.h>
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	40
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	41 static int speedstep_init(cpu_t *);
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	42 static void speedstep_fini(cpu_t *);
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	43 static void speedstep_power(cpuset_t, uint32_t);
10488 296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	44 static void speedstep_stop(cpu_t *);
13660 1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	45 static boolean_t speedstep_turbo_supported(void);
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	46
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	47 /*
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	48 * Interfaces for modules implementing Intel's Enhanced SpeedStep.
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	49 */
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	50 cpupm_state_ops_t speedstep_ops = {
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	51 "Enhanced SpeedStep Technology",
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	52 speedstep_init,
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	53 speedstep_fini,
10488 296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	54 speedstep_power,
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	55 speedstep_stop
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	56 };
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	57
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	58 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	59 * Error returns
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	60 */
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	61 #define ESS_RET_SUCCESS 0x00
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	62 #define ESS_RET_NO_PM 0x01
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	63 #define ESS_RET_UNSUP_STATE 0x02
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	64
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	65 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	66 * MSR registers for changing and reading processor power state.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	67 */
5651 74a472cd0e0a 6633911 IA32_PERF_STATCPUDRV_MSR ought to be IA32_PERF_STAT_MSR mh27603 parents: 4924 diff changeset	68 #define IA32_PERF_STAT_MSR 0x198
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	69 #define IA32_PERF_CTL_MSR 0x199
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	70
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	71 #define IA32_CPUID_TSC_CONSTANT 0xF30
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	72 #define IA32_MISC_ENABLE_MSR 0x1A0
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	73 #define IA32_MISC_ENABLE_EST (1<<16)
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	74 #define IA32_MISC_ENABLE_CXE (1<<25)
8935 5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	75
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	76 #define CPUID_TURBO_SUPPORT (1 << 1)
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	77
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	78 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	79 * Debugging support
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	80 */
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	81 #ifdef DEBUG
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	82 volatile int ess_debug = 0;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	83 #define ESSDEBUG(arglist) if (ess_debug) printf arglist;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	84 #else
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	85 #define ESSDEBUG(arglist)
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	86 #endif
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	87
6154 1398e77c9337 6667515 SpeedStep is not supported on platforms that incorrectly require _PDC bit 1 to be enabled mh27603 parents: 5651 diff changeset	88 /*
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	89 * Write the ctrl register. How it is written, depends upon the _PCT
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	90 * APCI object value.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	91 */
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	92 static void
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	93 write_ctrl(cpu_acpi_handle_t handle, uint32_t ctrl)
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	94 {
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	95 cpu_acpi_pct_t *pct_ctrl;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	96 uint64_t reg;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	97
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	98 pct_ctrl = CPU_ACPI_PCT_CTRL(handle);
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	99
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	100 switch (pct_ctrl->cr_addrspace_id) {
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	101 case ACPI_ADR_SPACE_FIXED_HARDWARE:
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	102 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	103 * Read current power state because reserved bits must be
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	104 * preserved, compose new value, and write it.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	105 */
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	106 reg = rdmsr(IA32_PERF_CTL_MSR);
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	107 reg &= ~((uint64_t)0xFFFF);
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	108 reg \|= ctrl;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	109 wrmsr(IA32_PERF_CTL_MSR, reg);
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	110 break;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	111
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	112 case ACPI_ADR_SPACE_SYSTEM_IO:
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	113 (void) cpu_acpi_write_port(pct_ctrl->cr_address, ctrl,
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	114 pct_ctrl->cr_width);
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	115 break;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	116
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	117 default:
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	118 DTRACE_PROBE1(ess_ctrl_unsupported_type, uint8_t,
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	119 pct_ctrl->cr_addrspace_id);
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	120 return;
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	121 }
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	122
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	123 DTRACE_PROBE1(ess_ctrl_write, uint32_t, ctrl);
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	124 }
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	125
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	126 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	127 * Transition the current processor to the requested state.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	128 */
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	129 void
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	130 speedstep_pstate_transition(uint32_t req_state)
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	131 {
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	132 cpupm_mach_state_t *mach_state =
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	133 (cpupm_mach_state_t *)CPU->cpu_m.mcpu_pm_mach_state;
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	134 cpu_acpi_handle_t handle = mach_state->ms_acpi_handle;
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	135 cpu_acpi_pstate_t *req_pstate;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	136 uint32_t ctrl;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	137
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	138 req_pstate = (cpu_acpi_pstate_t *)CPU_ACPI_PSTATES(handle);
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	139 req_pstate += req_state;
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	140
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	141 DTRACE_PROBE1(ess_transition, uint32_t, CPU_ACPI_FREQ(req_pstate));
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	142
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	143 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	144 * Initiate the processor p-state change.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	145 */
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	146 ctrl = CPU_ACPI_PSTATE_CTRL(req_pstate);
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	147 write_ctrl(handle, ctrl);
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	148
13660 1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	149 if (mach_state->ms_turbo != NULL)
1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	150 cpupm_record_turbo_info(mach_state->ms_turbo,
8935 5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	151 mach_state->ms_pstate.cma_state.pstate, req_state);
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	152
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	153 mach_state->ms_pstate.cma_state.pstate = req_state;
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	154 cpu_set_curr_clock(((uint64_t)CPU_ACPI_FREQ(req_pstate) * 1000000));
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	155 }
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	156
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	157 static void
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	158 speedstep_power(cpuset_t set, uint32_t req_state)
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	159 {
7388 f9a21a761e49 6738200 CPU power management sometimes makes gratuitous xc_call(). Mark Haywood <Mark.Haywood@Sun.COM> parents: 7319 diff changeset	160 /*
f9a21a761e49 6738200 CPU power management sometimes makes gratuitous xc_call(). Mark Haywood <Mark.Haywood@Sun.COM> parents: 7319 diff changeset	161 * If thread is already running on target CPU then just
f9a21a761e49 6738200 CPU power management sometimes makes gratuitous xc_call(). Mark Haywood <Mark.Haywood@Sun.COM> parents: 7319 diff changeset	162 * make the transition request. Otherwise, we'll need to
f9a21a761e49 6738200 CPU power management sometimes makes gratuitous xc_call(). Mark Haywood <Mark.Haywood@Sun.COM> parents: 7319 diff changeset	163 * make a cross-call.
f9a21a761e49 6738200 CPU power management sometimes makes gratuitous xc_call(). Mark Haywood <Mark.Haywood@Sun.COM> parents: 7319 diff changeset	164 */
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	165 kpreempt_disable();
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	166 if (CPU_IN_SET(set, CPU->cpu_id)) {
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	167 speedstep_pstate_transition(req_state);
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	168 CPUSET_DEL(set, CPU->cpu_id);
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	169 }
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	170 if (!CPUSET_ISNULL(set)) {
9489 7aad39a516b4 6770898 Performance of x86 cross calls Joe Bonasera <Joe.Bonasera@sun.com> parents: 8935 diff changeset	171 xc_call((xc_arg_t)req_state, NULL, NULL, CPUSET2BV(set),
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	172 (xc_func_t)speedstep_pstate_transition);
7388 f9a21a761e49 6738200 CPU power management sometimes makes gratuitous xc_call(). Mark Haywood <Mark.Haywood@Sun.COM> parents: 7319 diff changeset	173 }
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	174 kpreempt_enable();
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	175 }
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	176
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	177 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	178 * Validate that this processor supports Speedstep and if so,
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	179 * get the P-state data from ACPI and cache it.
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	180 */
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	181 static int
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	182 speedstep_init(cpu_t *cp)
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	183 {
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	184 cpupm_mach_state_t *mach_state =
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	185 (cpupm_mach_state_t *)cp->cpu_m.mcpu_pm_mach_state;
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	186 cpu_acpi_handle_t handle = mach_state->ms_acpi_handle;
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	187 cpu_acpi_pct_t *pct_stat;
14169 ae5fcf7b2a38 4048 cpu_acpi is too verbose about disabled SpeedStep/PowerNow! support Yuri Pankov <yuri.pankov@nexenta.com> parents: 13660 diff changeset	188 static int logged = 0;
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	189
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	190 ESSDEBUG(("speedstep_init: processor %d\n", cp->cpu_id));
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	191
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	192 /*
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	193 * Cache the P-state specific ACPI data.
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	194 */
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	195 if (cpu_acpi_cache_pstate_data(handle) != 0) {
14169 ae5fcf7b2a38 4048 cpu_acpi is too verbose about disabled SpeedStep/PowerNow! support Yuri Pankov <yuri.pankov@nexenta.com> parents: 13660 diff changeset	196 if (!logged) {
ae5fcf7b2a38 4048 cpu_acpi is too verbose about disabled SpeedStep/PowerNow! support Yuri Pankov <yuri.pankov@nexenta.com> parents: 13660 diff changeset	197 cmn_err(CE_NOTE, "!SpeedStep support is being "
ae5fcf7b2a38 4048 cpu_acpi is too verbose about disabled SpeedStep/PowerNow! support Yuri Pankov <yuri.pankov@nexenta.com> parents: 13660 diff changeset	198 "disabled due to errors parsing ACPI P-state "
ae5fcf7b2a38 4048 cpu_acpi is too verbose about disabled SpeedStep/PowerNow! support Yuri Pankov <yuri.pankov@nexenta.com> parents: 13660 diff changeset	199 "objects exported by BIOS.");
ae5fcf7b2a38 4048 cpu_acpi is too verbose about disabled SpeedStep/PowerNow! support Yuri Pankov <yuri.pankov@nexenta.com> parents: 13660 diff changeset	200 logged = 1;
ae5fcf7b2a38 4048 cpu_acpi is too verbose about disabled SpeedStep/PowerNow! support Yuri Pankov <yuri.pankov@nexenta.com> parents: 13660 diff changeset	201 }
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	202 speedstep_fini(cp);
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	203 return (ESS_RET_NO_PM);
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	204 }
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	205
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	206 pct_stat = CPU_ACPI_PCT_STATUS(handle);
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	207 switch (pct_stat->cr_addrspace_id) {
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	208 case ACPI_ADR_SPACE_FIXED_HARDWARE:
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	209 ESSDEBUG(("Transitions will use fixed hardware\n"));
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	210 break;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	211 case ACPI_ADR_SPACE_SYSTEM_IO:
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	212 ESSDEBUG(("Transitions will use system IO\n"));
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	213 break;
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	214 default:
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	215 cmn_err(CE_WARN, "!_PCT conifgured for unsupported "
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	216 "addrspace = %d.", pct_stat->cr_addrspace_id);
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	217 cmn_err(CE_NOTE, "!CPU power management will not function.");
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	218 speedstep_fini(cp);
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	219 return (ESS_RET_NO_PM);
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	220 }
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	221
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	222 cpupm_alloc_domains(cp, CPUPM_P_STATES);
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	223
13660 1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	224 if (speedstep_turbo_supported())
1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	225 mach_state->ms_turbo = cpupm_turbo_init(cp);
8935 5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	226
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	227 ESSDEBUG(("Processor %d succeeded.\n", cp->cpu_id))
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	228 return (ESS_RET_SUCCESS);
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	229 }
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	230
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	231 /*
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	232 * Free resources allocated by speedstep_init().
2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	233 */
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	234 static void
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	235 speedstep_fini(cpu_t *cp)
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	236 {
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	237 cpupm_mach_state_t *mach_state =
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	238 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	239 cpu_acpi_handle_t handle = mach_state->ms_acpi_handle;
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	240
8906 e559381f1e2b PSARC 2008/777 cpupm keyword mode extensions Eric Saxe <Eric.Saxe@Sun.COM> parents: 7774 diff changeset	241 cpupm_free_domains(&cpupm_pstate_domains);
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	242 cpu_acpi_free_pstate_data(handle);
8935 5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	243
13660 1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	244 if (mach_state->ms_turbo != NULL)
1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	245 cpupm_turbo_fini(mach_state->ms_turbo);
1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	246 mach_state->ms_turbo = NULL;
4667 2cb417b1d90c PSARC/2004/826 Opteron Athlon64 Frequency Management mh27603 parents: diff changeset	247 }
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	248
10488 296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	249 static void
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	250 speedstep_stop(cpu_t *cp)
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	251 {
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	252 cpupm_mach_state_t *mach_state =
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	253 (cpupm_mach_state_t *)(cp->cpu_m.mcpu_pm_mach_state);
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	254 cpu_acpi_handle_t handle = mach_state->ms_acpi_handle;
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	255
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	256 cpupm_remove_domains(cp, CPUPM_P_STATES, &cpupm_pstate_domains);
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	257 cpu_acpi_free_pstate_data(handle);
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	258
13660 1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	259 if (mach_state->ms_turbo != NULL)
1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	260 cpupm_turbo_fini(mach_state->ms_turbo);
1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	261 mach_state->ms_turbo = NULL;
10488 296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	262 }
296c315b92df 6878359 CPU power management driver needs to support detach Mark Haywood <Mark.Haywood@Sun.COM> parents: 10075 diff changeset	263
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	264 boolean_t
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	265 speedstep_supported(uint_t family, uint_t model)
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	266 {
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	267 struct cpuid_regs cpu_regs;
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	268
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	269 /* Required features */
12838 fca99d9e3f2f 6812663 Running out of bits in x86_feature Kuriakose Kuruvilla <kuriakose.kuruvilla@oracle.com> parents: 10488 diff changeset	270 if (!is_x86_feature(x86_featureset, X86FSET_CPUID) \|\|
fca99d9e3f2f 6812663 Running out of bits in x86_feature Kuriakose Kuruvilla <kuriakose.kuruvilla@oracle.com> parents: 10488 diff changeset	271 !is_x86_feature(x86_featureset, X86FSET_MSR)) {
7319 d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	272 return (B_FALSE);
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	273 }
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	274
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	275 /*
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	276 * We only support family/model combinations which
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	277 * are P-state TSC invariant.
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	278 */
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	279 if (!((family == 0xf && model >= 0x3) \|\|
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	280 (family == 0x6 && model >= 0xe))) {
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	281 return (B_FALSE);
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	282 }
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	283
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	284 /*
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	285 * Enhanced SpeedStep supported?
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	286 */
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	287 cpu_regs.cp_eax = 0x1;
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	288 (void) __cpuid_insn(&cpu_regs);
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	289 if (!(cpu_regs.cp_ecx & CPUID_INTC_ECX_EST)) {
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	290 return (B_FALSE);
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	291 }
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	292
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	293 return (B_TRUE);
d281dd2d2049 6715149 T-State support for intel based processors Mark Haywood <Mark.Haywood@Sun.COM> parents: 6154 diff changeset	294 }
8935 5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	295
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	296 boolean_t
13660 1905bad7dc63 2581 Observability for AMD Core Performance Boost Hans Rosenfeld <rosenfeld@grumpf.hope-2000.org> parents: 12838 diff changeset	297 speedstep_turbo_supported(void)
8935 5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	298 {
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	299 struct cpuid_regs cpu_regs;
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	300
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	301 /* Required features */
12838 fca99d9e3f2f 6812663 Running out of bits in x86_feature Kuriakose Kuruvilla <kuriakose.kuruvilla@oracle.com> parents: 10488 diff changeset	302 if (!is_x86_feature(x86_featureset, X86FSET_CPUID) \|\|
fca99d9e3f2f 6812663 Running out of bits in x86_feature Kuriakose Kuruvilla <kuriakose.kuruvilla@oracle.com> parents: 10488 diff changeset	303 !is_x86_feature(x86_featureset, X86FSET_MSR)) {
8935 5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	304 return (B_FALSE);
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	305 }
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	306
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	307 /*
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	308 * turbo mode supported?
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	309 */
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	310 cpu_regs.cp_eax = 0x6;
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	311 (void) __cpuid_insn(&cpu_regs);
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	312 if (!(cpu_regs.cp_eax & CPUID_TURBO_SUPPORT)) {
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	313 return (B_FALSE);
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	314 }
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	315
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	316 return (B_TRUE);
5bd81ee07936 PSARC 2009/101 Turbo mode observability Rafael Vanoni <rafael.vanoni@sun.com> parents: 8906 diff changeset	317 }

Mercurial > illumos > illumos-gate

annotate usr/src/uts/i86pc/os/cpupm/speedstep.c @ 14169:ae5fcf7b2a38