Mercurial > illumos > illumos-gate
changeset 7295:0a40d4215127 onnv_96
6721773 panics in pci-x interrupt handler
| author | et142600 |
|---|---|
| date | Mon, 04 Aug 2008 21:54:51 -0700 |
| parents | c9c31ef4c960 |
| children | 095b8552fd20 |
| files | usr/src/uts/common/io/pcie_fault.c |
| diffstat | 1 files changed, 14 insertions(+), 0 deletions(-) [+] |
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--- a/usr/src/uts/common/io/pcie_fault.c Mon Aug 04 20:36:57 2008 -0700 +++ b/usr/src/uts/common/io/pcie_fault.c Mon Aug 04 21:54:51 2008 -0700 @@ -1772,6 +1772,20 @@ * another error like PTLP and MFP */ aer_ue &= ~PCIE_AER_UCE_ECRC; + + /* + * Generally if NFE is set, SERR should also be set. Exception: + * When certain non-fatal errors are masked, and some of them + * happened to be the cause of the NFE, SERR will not be set and + * they can not be the source of this interrupt. + * + * On x86, URs are masked (NFE + UR can be set), if any other + * non-fatal errors (i.e, PTLP, CTO, CA, UC, ECRC, ACS) did + * occur, SERR should be set since they are not masked. So if + * SERR is not set, none of them occurred. + */ + if (!(PCI_ERR_REG(pfd_p)->pci_err_status & PCI_STAT_S_SYSERR)) + aer_ue &= ~PCIE_AER_UCE_TO; } if (!PCIE_IS_BDG(PCIE_PFD2BUS(pfd_p))) {