Mercurial > illumos > illumos-gate
changeset 11236:1127b4f9e96b
6783915 numerous drivers using devacc_attr_access without specifying DDI_DEVICE_ATTR_V1
6765185 ddi_dma_mem_alloc should ignore devacc_attr_access
6886100 DDI_FLAGERR_ACC accesses on x86 should use i_ddi_prot_io_get8() calls as on sparc
6886098 ddi_fm_acc_err_get()/ddi_fm_dma_err_get() copy data when they don't need to
6901678 crossbow changes broke dma handle checking in bge driver
6901000 lint warning in mtst_cpu.c
line wrap: on
line diff
--- a/usr/src/uts/common/crypto/io/dca.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/crypto/io/dca.c Thu Dec 03 04:39:22 2009 -0800 @@ -453,7 +453,7 @@ * Device attributes. */ static struct ddi_device_acc_attr dca_regsattr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, DDI_STRICTORDER_ACC, DDI_FLAGERR_ACC @@ -462,16 +462,14 @@ static struct ddi_device_acc_attr dca_devattr = { DDI_DEVICE_ATTR_V0, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC, - DDI_FLAGERR_ACC + DDI_STRICTORDER_ACC }; #if !defined(i386) && !defined(__i386) static struct ddi_device_acc_attr dca_bufattr = { DDI_DEVICE_ATTR_V0, DDI_NEVERSWAP_ACC, - DDI_STRICTORDER_ACC, - DDI_FLAGERR_ACC + DDI_STRICTORDER_ACC }; #endif @@ -4893,7 +4891,6 @@ /* Only register with IO Fault Services if we have some capability */ if (dca->fm_capabilities) { dca_regsattr.devacc_attr_access = DDI_FLAGERR_ACC; - dca_devattr.devacc_attr_access = DDI_FLAGERR_ACC; dca_dmaattr.dma_attr_flags = DDI_DMA_FLAGERR; /* Register capabilities with IO Fault Services */ @@ -4922,7 +4919,6 @@ * FMA capabilities at runtime. */ dca_regsattr.devacc_attr_access = DDI_DEFAULT_ACC; - dca_devattr.devacc_attr_access = DDI_DEFAULT_ACC; dca_dmaattr.dma_attr_flags = 0; } }
--- a/usr/src/uts/common/io/aac/aac.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/aac/aac.c Thu Dec 03 04:39:22 2009 -0800 @@ -610,9 +610,10 @@ }; ddi_device_acc_attr_t aac_acc_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC + DDI_STRICTORDER_ACC, + DDI_DEFAULT_ACC }; static struct { @@ -785,6 +786,7 @@ softs->buf_dma_attr = softs->addr_dma_attr = aac_dma_attr; softs->addr_dma_attr.dma_attr_granular = 1; softs->acc_attr = aac_acc_attr; + softs->reg_attr = aac_acc_attr; softs->card = AAC_UNKNOWN_CARD; #ifdef DEBUG softs->debug_flags = aac_debug_flags; @@ -805,7 +807,7 @@ /* Map PCI mem space */ if (ddi_regs_map_setup(dip, 1, (caddr_t *)&softs->pci_mem_base_vaddr, 0, - softs->map_size_min, &softs->acc_attr, + softs->map_size_min, &softs->reg_attr, &softs->pci_mem_handle) != DDI_SUCCESS) goto error; @@ -2289,7 +2291,7 @@ /* read out and save PCI MBR */ if ((atu_size > softs->map_size) && (ddi_regs_map_setup(softs->devinfo_p, 1, - (caddr_t *)&data, 0, atu_size, &softs->acc_attr, + (caddr_t *)&data, 0, atu_size, &softs->reg_attr, &pci_handle) == DDI_SUCCESS)) { ddi_regs_map_free(&softs->pci_mem_handle); softs->pci_mem_handle = pci_handle; @@ -6461,7 +6463,7 @@ /* Only register with IO Fault Services if we have some capability */ if (softs->fm_capabilities) { /* Adjust access and dma attributes for FMA */ - softs->acc_attr.devacc_attr_access |= DDI_FLAGERR_ACC; + softs->reg_attr.devacc_attr_access = DDI_FLAGERR_ACC; softs->addr_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; softs->buf_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; @@ -6519,7 +6521,7 @@ ddi_fm_fini(softs->devinfo_p); /* Adjust access and dma attributes for FMA */ - softs->acc_attr.devacc_attr_access &= ~DDI_FLAGERR_ACC; + softs->reg_attr.devacc_attr_access = DDI_DEFAULT_ACC; softs->addr_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; softs->buf_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; }
--- a/usr/src/uts/common/io/aac/aac.h Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/aac/aac.h Thu Dec 03 04:39:22 2009 -0800 @@ -296,6 +296,7 @@ /* PCI spaces */ ddi_device_acc_attr_t acc_attr; + ddi_device_acc_attr_t reg_attr; ddi_acc_handle_t pci_mem_handle; uint8_t *pci_mem_base_vaddr; uint32_t pci_mem_base_paddr;
--- a/usr/src/uts/common/io/audio/drv/audio1575/audio1575.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/audio/drv/audio1575/audio1575.c Thu Dec 03 04:39:22 2009 -0800 @@ -1370,11 +1370,6 @@ { dev_info_t *dip = statep->dip; - /* Check for fault management capabilities */ - if (DDI_FM_ACC_ERR_CAP(ddi_fm_capable(dip))) { - dev_attr.devacc_attr_access = DDI_FLAGERR_ACC; - } - /* map the M1575 Audio PCI Cfg Space */ if (pci_config_setup(dip, &statep->pcih) != DDI_SUCCESS) { audio_dev_warn(statep->adev, "PCI config map failure");
--- a/usr/src/uts/common/io/bge/bge_main2.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/bge/bge_main2.c Thu Dec 03 04:39:22 2009 -0800 @@ -81,7 +81,7 @@ * PIO access attributes for registers */ static ddi_device_acc_attr_t bge_reg_accattr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_NEVERSWAP_ACC, DDI_STRICTORDER_ACC, DDI_FLAGERR_ACC @@ -93,8 +93,7 @@ static ddi_device_acc_attr_t bge_desc_accattr = { DDI_DEVICE_ATTR_V0, DDI_NEVERSWAP_ACC, - DDI_STRICTORDER_ACC, - DDI_FLAGERR_ACC + DDI_STRICTORDER_ACC }; /* @@ -2926,7 +2925,6 @@ /* Only register with IO Fault Services if we have some capability */ if (bgep->fm_capabilities) { bge_reg_accattr.devacc_attr_access = DDI_FLAGERR_ACC; - bge_desc_accattr.devacc_attr_access = DDI_FLAGERR_ACC; dma_attr.dma_attr_flags = DDI_DMA_FLAGERR; /* Register capabilities with IO Fault Services */ @@ -2951,7 +2949,6 @@ * FMA capabilities at runtime. */ bge_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC; - bge_desc_accattr.devacc_attr_access = DDI_DEFAULT_ACC; dma_attr.dma_attr_flags = 0; } }
--- a/usr/src/uts/common/io/bge/bge_recv2.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/bge/bge_recv2.c Thu Dec 03 04:39:22 2009 -0800 @@ -20,7 +20,7 @@ */ /* - * Copyright 2008 Sun Microsystems, Inc. All rights reserved. + * Copyright 2009 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -361,6 +361,21 @@ * before accepting the packets they describe */ DMA_SYNC(rrp->desc, DDI_DMA_SYNC_FORKERNEL); + if (*rrp->prod_index_p >= rrp->desc.nslots) { + bgep->bge_chip_state = BGE_CHIP_ERROR; + bge_fm_ereport(bgep, DDI_FM_DEVICE_INVAL_STATE); + mutex_exit(rrp->rx_lock); + return (NULL); + } + if (bge_check_dma_handle(bgep, rrp->desc.dma_hdl) != DDI_FM_OK) { + rrp->rx_next = *rrp->prod_index_p; + bge_mbx_put(bgep, rrp->chip_mbx_reg, rrp->rx_next); + bgep->bge_dma_error = B_TRUE; + bgep->bge_chip_state = BGE_CHIP_ERROR; + mutex_exit(rrp->rx_lock); + return (NULL); + } + hw_rbd_p = DMA_VPTR(rrp->desc); head = NULL; tail = &head; @@ -377,6 +392,8 @@ } bge_mbx_put(bgep, rrp->chip_mbx_reg, rrp->rx_next); + if (bge_check_acc_handle(bgep, bgep->io_handle) != DDI_FM_OK) + bgep->bge_chip_state = BGE_CHIP_ERROR; mutex_exit(rrp->rx_lock); return (head); }
--- a/usr/src/uts/common/io/e1000g/e1000g_alloc.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/e1000g/e1000g_alloc.c Thu Dec 03 04:39:22 2009 -0800 @@ -20,7 +20,7 @@ /* * Copyright 2009 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms of the CDDLv1. + * Use is subject to license terms. */ /* @@ -79,8 +79,7 @@ static ddi_device_acc_attr_t e1000g_desc_acc_attr = { DDI_DEVICE_ATTR_V0, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC, - DDI_FLAGERR_ACC + DDI_STRICTORDER_ACC }; /* DMA access attributes for DMA buffers */ @@ -1504,14 +1503,8 @@ /* ARGSUSED */ void -e1000g_set_fma_flags(struct e1000g *Adapter, int acc_flag, int dma_flag) +e1000g_set_fma_flags(int dma_flag) { - if (acc_flag) { - e1000g_desc_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; - } else { - e1000g_desc_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; - } - if (dma_flag) { e1000g_tx_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR; e1000g_buf_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
--- a/usr/src/uts/common/io/e1000g/e1000g_main.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/e1000g/e1000g_main.c Thu Dec 03 04:39:22 2009 -0800 @@ -224,7 +224,7 @@ /* Access attributes for register mapping */ static ddi_device_acc_attr_t e1000g_regs_acc_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, DDI_STRICTORDER_ACC, DDI_FLAGERR_ACC @@ -5975,15 +5975,13 @@ e1000g_fm_init(struct e1000g *Adapter) { ddi_iblock_cookie_t iblk; - int fma_acc_flag, fma_dma_flag; + int fma_dma_flag; /* Only register with IO Fault Services if we have some capability */ if (Adapter->fm_capabilities & DDI_FM_ACCCHK_CAPABLE) { e1000g_regs_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; - fma_acc_flag = 1; } else { e1000g_regs_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; - fma_acc_flag = 0; } if (Adapter->fm_capabilities & DDI_FM_DMACHK_CAPABLE) { @@ -5992,7 +5990,7 @@ fma_dma_flag = 0; } - (void) e1000g_set_fma_flags(Adapter, fma_acc_flag, fma_dma_flag); + (void) e1000g_set_fma_flags(fma_dma_flag); if (Adapter->fm_capabilities) {
--- a/usr/src/uts/common/io/e1000g/e1000g_sw.h Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/e1000g/e1000g_sw.h Thu Dec 03 04:39:22 2009 -0800 @@ -1044,7 +1044,7 @@ int e1000g_check_acc_handle(ddi_acc_handle_t handle); int e1000g_check_dma_handle(ddi_dma_handle_t handle); void e1000g_fm_ereport(struct e1000g *Adapter, char *detail); -void e1000g_set_fma_flags(struct e1000g *Adapter, int acc_flag, int dma_flag); +void e1000g_set_fma_flags(int dma_flag); int e1000g_reset_link(struct e1000g *Adapter); /*
--- a/usr/src/uts/common/io/fibre-channel/fca/emlxs/emlxs_solaris.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/fibre-channel/fca/emlxs/emlxs_solaris.c Thu Dec 03 04:39:22 2009 -0800 @@ -10937,10 +10937,8 @@ if (DDI_FM_ACC_ERR_CAP(hba->fm_caps)) { emlxs_dev_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; - emlxs_data_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; } else { emlxs_dev_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; - emlxs_data_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; } if (DDI_FM_DMA_ERR_CAP(hba->fm_caps)) {
--- a/usr/src/uts/common/io/hxge/hxge_fm.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/hxge/hxge_fm.c Thu Dec 03 04:39:22 2009 -0800 @@ -19,12 +19,10 @@ * CDDL HEADER END */ /* - * Copyright 2008 Sun Microsystems, Inc. All rights reserved. + * Copyright 2009 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <hxge_impl.h> #include <sys/ddifm.h> #include <sys/fm/protocol.h> @@ -173,7 +171,7 @@ void hxge_fm_init(p_hxge_t hxgep, ddi_device_acc_attr_t *reg_attr, - ddi_device_acc_attr_t *desc_attr, ddi_dma_attr_t *dma_attr) + ddi_dma_attr_t *dma_attr) { ddi_iblock_cookie_t iblk; @@ -218,10 +216,8 @@ */ if (DDI_FM_ACC_ERR_CAP(hxgep->fm_capabilities)) { reg_attr->devacc_attr_access = DDI_FLAGERR_ACC; - desc_attr->devacc_attr_access = DDI_FLAGERR_ACC; } else { reg_attr->devacc_attr_access = DDI_DEFAULT_ACC; - desc_attr->devacc_attr_access = DDI_DEFAULT_ACC; } /*
--- a/usr/src/uts/common/io/hxge/hxge_main.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/hxge/hxge_main.c Thu Dec 03 04:39:22 2009 -0800 @@ -217,7 +217,7 @@ extern hxge_status_t hxge_ldgv_uninit(); extern hxge_status_t hxge_intr_ldgv_init(); extern void hxge_fm_init(p_hxge_t hxgep, ddi_device_acc_attr_t *reg_attr, - ddi_device_acc_attr_t *desc_attr, ddi_dma_attr_t *dma_attr); + ddi_dma_attr_t *dma_attr); extern void hxge_fm_fini(p_hxge_t hxgep); /* @@ -230,9 +230,10 @@ * Device register access attributes for PIO. */ static ddi_device_acc_attr_t hxge_dev_reg_acc_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, DDI_STRICTORDER_ACC, + DDI_DEFAULT_ACC }; /* @@ -468,8 +469,7 @@ hxgep->mmac.addrs[i].primary = B_FALSE; } - hxge_fm_init(hxgep, &hxge_dev_reg_acc_attr, &hxge_dev_desc_dma_acc_attr, - &hxge_rx_dma_attr); + hxge_fm_init(hxgep, &hxge_dev_reg_acc_attr, &hxge_rx_dma_attr); status = hxge_map_regs(hxgep); if (status != HXGE_OK) {
--- a/usr/src/uts/common/io/ib/adapters/hermon/hermon.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/ib/adapters/hermon/hermon.c Thu Dec 03 04:39:22 2009 -0800 @@ -1465,7 +1465,7 @@ cleanup = HERMON_DRV_CLEANUP_LEVEL0; /* Setup device access attributes */ - state->hs_reg_accattr.devacc_attr_version = DDI_DEVICE_ATTR_V0; + state->hs_reg_accattr.devacc_attr_version = DDI_DEVICE_ATTR_V1; state->hs_reg_accattr.devacc_attr_endian_flags = DDI_STRUCTURE_BE_ACC; state->hs_reg_accattr.devacc_attr_dataorder = DDI_STRICTORDER_ACC; state->hs_reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC;
--- a/usr/src/uts/common/io/igb/igb_buf.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/igb/igb_buf.c Thu Dec 03 04:39:22 2009 -0800 @@ -23,7 +23,7 @@ /* * Copyright 2009 Sun Microsystems, Inc. All rights reserved. - * Use is subject to license terms of the CDDL. + * Use is subject to license terms. */ #include "igb_sw.h" @@ -105,8 +105,7 @@ static ddi_device_acc_attr_t igb_desc_acc_attr = { DDI_DEVICE_ATTR_V0, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC, - DDI_FLAGERR_ACC + DDI_STRICTORDER_ACC }; /* @@ -865,14 +864,8 @@ } void -igb_set_fma_flags(int acc_flag, int dma_flag) +igb_set_fma_flags(int dma_flag) { - if (acc_flag) { - igb_desc_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; - } else { - igb_desc_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; - } - if (dma_flag) { igb_tx_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR; igb_buf_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
--- a/usr/src/uts/common/io/igb/igb_main.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/igb/igb_main.c Thu Dec 03 04:39:22 2009 -0800 @@ -164,7 +164,7 @@ /* Access attributes for register mapping */ ddi_device_acc_attr_t igb_regs_acc_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, DDI_STRICTORDER_ACC, DDI_FLAGERR_ACC @@ -4930,15 +4930,13 @@ igb_fm_init(igb_t *igb) { ddi_iblock_cookie_t iblk; - int fma_acc_flag, fma_dma_flag; + int fma_dma_flag; /* Only register with IO Fault Services if we have some capability */ if (igb->fm_capabilities & DDI_FM_ACCCHK_CAPABLE) { igb_regs_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; - fma_acc_flag = 1; } else { igb_regs_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; - fma_acc_flag = 0; } if (igb->fm_capabilities & DDI_FM_DMACHK_CAPABLE) { @@ -4947,7 +4945,7 @@ fma_dma_flag = 0; } - (void) igb_set_fma_flags(fma_acc_flag, fma_dma_flag); + (void) igb_set_fma_flags(fma_dma_flag); if (igb->fm_capabilities) {
--- a/usr/src/uts/common/io/igb/igb_sw.h Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/igb/igb_sw.h Thu Dec 03 04:39:22 2009 -0800 @@ -852,7 +852,7 @@ int igb_check_acc_handle(ddi_acc_handle_t); int igb_check_dma_handle(ddi_dma_handle_t); void igb_fm_ereport(igb_t *, char *); -void igb_set_fma_flags(int, int); +void igb_set_fma_flags(int); /* * Function prototypes in igb_gld.c
--- a/usr/src/uts/common/io/ixgbe/ixgbe_buf.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/ixgbe/ixgbe_buf.c Thu Dec 03 04:39:22 2009 -0800 @@ -104,8 +104,7 @@ static ddi_device_acc_attr_t ixgbe_desc_acc_attr = { DDI_DEVICE_ATTR_V0, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC, - DDI_FLAGERR_ACC + DDI_STRICTORDER_ACC }; /* @@ -922,14 +921,8 @@ * ixgbe_set_fma_flags - Set the attribute for fma support. */ void -ixgbe_set_fma_flags(int acc_flag, int dma_flag) +ixgbe_set_fma_flags(int dma_flag) { - if (acc_flag) { - ixgbe_desc_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; - } else { - ixgbe_desc_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; - } - if (dma_flag) { ixgbe_tx_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR; ixgbe_buf_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
--- a/usr/src/uts/common/io/ixgbe/ixgbe_main.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/ixgbe/ixgbe_main.c Thu Dec 03 04:39:22 2009 -0800 @@ -180,7 +180,7 @@ * Access attributes for register mapping */ ddi_device_acc_attr_t ixgbe_regs_acc_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, DDI_STRICTORDER_ACC, DDI_FLAGERR_ACC @@ -4500,17 +4500,15 @@ ixgbe_fm_init(ixgbe_t *ixgbe) { ddi_iblock_cookie_t iblk; - int fma_acc_flag, fma_dma_flag; + int fma_dma_flag; /* * Only register with IO Fault Services if we have some capability */ if (ixgbe->fm_capabilities & DDI_FM_ACCCHK_CAPABLE) { ixgbe_regs_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; - fma_acc_flag = 1; } else { ixgbe_regs_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; - fma_acc_flag = 0; } if (ixgbe->fm_capabilities & DDI_FM_DMACHK_CAPABLE) { @@ -4519,7 +4517,7 @@ fma_dma_flag = 0; } - ixgbe_set_fma_flags(fma_acc_flag, fma_dma_flag); + ixgbe_set_fma_flags(fma_dma_flag); if (ixgbe->fm_capabilities) {
--- a/usr/src/uts/common/io/ixgbe/ixgbe_sw.h Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/ixgbe/ixgbe_sw.h Thu Dec 03 04:39:22 2009 -0800 @@ -776,7 +776,7 @@ */ int ixgbe_alloc_dma(ixgbe_t *); void ixgbe_free_dma(ixgbe_t *); -void ixgbe_set_fma_flags(int, int); +void ixgbe_set_fma_flags(int); void ixgbe_free_dma_buffer(dma_buffer_t *); int ixgbe_alloc_rx_ring_data(ixgbe_rx_ring_t *rx_ring); void ixgbe_free_rx_ring_data(ixgbe_rx_data_t *rx_data);
--- a/usr/src/uts/common/io/mega_sas/megaraid_sas.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/mega_sas/megaraid_sas.c Thu Dec 03 04:39:22 2009 -0800 @@ -157,9 +157,10 @@ }; static struct ddi_device_acc_attr endian_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC + DDI_STRICTORDER_ACC, + DDI_DEFAULT_ACC }; @@ -2994,7 +2995,10 @@ int i; size_t alen = 0; uint_t cookie_cnt; - + struct ddi_device_acc_attr tmp_endian_attr; + + tmp_endian_attr = endian_attr; + tmp_endian_attr.devacc_attr_access = DDI_DEFAULT_ACC; i = ddi_dma_alloc_handle(instance->dip, &obj->dma_attr, DDI_DMA_SLEEP, NULL, &obj->dma_handle); if (i != DDI_SUCCESS) { @@ -3017,7 +3021,7 @@ return (-1); } - if ((ddi_dma_mem_alloc(obj->dma_handle, obj->size, &endian_attr, + if ((ddi_dma_mem_alloc(obj->dma_handle, obj->size, &tmp_endian_attr, DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP, NULL, &obj->buffer, &alen, &obj->acc_handle) != DDI_SUCCESS) || alen < obj->size) {
--- a/usr/src/uts/common/io/mr_sas/mr_sas.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/mr_sas/mr_sas.c Thu Dec 03 04:39:22 2009 -0800 @@ -164,9 +164,10 @@ }; static struct ddi_device_acc_attr endian_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC + DDI_STRICTORDER_ACC, + DDI_DEFAULT_ACC }; @@ -2981,6 +2982,7 @@ tmp_endian_attr = endian_attr; tmp_endian_attr.devacc_attr_endian_flags = endian_flags; + tmp_endian_attr.devacc_attr_access = DDI_DEFAULT_ACC; i = ddi_dma_alloc_handle(instance->dip, &obj->dma_attr, DDI_DMA_SLEEP, NULL, &obj->dma_handle);
--- a/usr/src/uts/common/io/nxge/nxge_fm.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/nxge/nxge_fm.c Thu Dec 03 04:39:22 2009 -0800 @@ -19,12 +19,10 @@ * CDDL HEADER END */ /* - * Copyright 2008 Sun Microsystems, Inc. All rights reserved. + * Copyright 2009 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/nxge/nxge_impl.h> #include <sys/nxge/nxge_hio.h> #include <sys/ddifm.h> @@ -347,7 +345,7 @@ void nxge_fm_init(p_nxge_t nxgep, ddi_device_acc_attr_t *reg_attr, - ddi_device_acc_attr_t *desc_attr, ddi_dma_attr_t *dma_attr) + ddi_dma_attr_t *dma_attr) { ddi_iblock_cookie_t iblk; @@ -399,10 +397,8 @@ */ if (DDI_FM_ACC_ERR_CAP(nxgep->fm_capabilities)) { reg_attr->devacc_attr_access = DDI_FLAGERR_ACC; - desc_attr->devacc_attr_access = DDI_FLAGERR_ACC; } else { reg_attr->devacc_attr_access = DDI_DEFAULT_ACC; - desc_attr->devacc_attr_access = DDI_DEFAULT_ACC; } /*
--- a/usr/src/uts/common/io/nxge/nxge_main.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/nxge/nxge_main.c Thu Dec 03 04:39:22 2009 -0800 @@ -396,7 +396,6 @@ extern nxge_status_t nxge_intr_ldgv_init(p_nxge_t); extern void nxge_fm_init(p_nxge_t, ddi_device_acc_attr_t *, - ddi_device_acc_attr_t *, ddi_dma_attr_t *); extern void nxge_fm_fini(p_nxge_t); extern npi_status_t npi_mac_altaddr_disable(npi_handle_t, uint8_t, uint8_t); @@ -411,9 +410,10 @@ * Device register access attributes for PIO. */ static ddi_device_acc_attr_t nxge_dev_reg_acc_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, DDI_STRICTORDER_ACC, + DDI_DEFAULT_ACC }; /* @@ -610,9 +610,7 @@ goto nxge_attach_fail3; } - nxge_fm_init(nxgep, &nxge_dev_reg_acc_attr, - &nxge_dev_desc_dma_acc_attr, - &nxge_rx_dma_attr); + nxge_fm_init(nxgep, &nxge_dev_reg_acc_attr, &nxge_rx_dma_attr); /* Create & initialize the per-Neptune data structure */ /* (even if we're a guest). */
--- a/usr/src/uts/common/io/pciex/pcieb.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/pciex/pcieb.c Thu Dec 03 04:39:22 2009 -0800 @@ -460,6 +460,12 @@ { dev_info_t *pdip; + if (PCIE_IS_RP(PCIE_DIP2BUS(dip))) { + ddi_acc_impl_t *hdlp = + (ddi_acc_impl_t *)(mp->map_handlep)->ah_platform_private; + + pcieb_set_prot_scan(dip, hdlp); + } pdip = (dev_info_t *)DEVI(dip)->devi_parent; return ((DEVI(pdip)->devi_ops->devo_bus_ops->bus_map)(pdip, rdip, mp, offset, len, vaddrp));
--- a/usr/src/uts/common/io/pciex/pcieb.h Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/pciex/pcieb.h Thu Dec 03 04:39:22 2009 -0800 @@ -160,6 +160,7 @@ ddi_acc_handle_t config_handle); extern int pcieb_plat_peekpoke(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, void *arg, void *result); +extern void pcieb_set_prot_scan(dev_info_t *dip, ddi_acc_impl_t *hdlp); extern int pcieb_plat_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, ddi_intr_handle_impl_t *hdlp, void *result); extern boolean_t pcieb_plat_msi_supported(dev_info_t *dip);
--- a/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/scsi/adapters/mpt_sas/mptsas.c Thu Dec 03 04:39:22 2009 -0800 @@ -472,9 +472,10 @@ }; ddi_device_acc_attr_t mptsas_dev_attr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC + DDI_STRICTORDER_ACC, + DDI_DEFAULT_ACC }; static struct cb_ops mptsas_cb_ops = { @@ -962,6 +963,7 @@ /* Make a per-instance copy of the structures */ mpt->m_io_dma_attr = mptsas_dma_attrs64; mpt->m_msg_dma_attr = mptsas_dma_attrs; + mpt->m_reg_acc_attr = mptsas_dev_attr; mpt->m_dev_acc_attr = mptsas_dev_attr; /* @@ -1006,7 +1008,7 @@ } if (ddi_regs_map_setup(dip, mem_bar, (caddr_t *)&mpt->m_reg, - 0, 0, &mpt->m_dev_acc_attr, &mpt->m_datap) != DDI_SUCCESS) { + 0, 0, &mpt->m_reg_acc_attr, &mpt->m_datap) != DDI_SUCCESS) { mptsas_log(mpt, CE_WARN, "map setup failed"); goto fail; } @@ -11771,7 +11773,7 @@ /* Only register with IO Fault Services if we have some capability */ if (mpt->m_fm_capabilities) { /* Adjust access and dma attributes for FMA */ - mpt->m_dev_acc_attr.devacc_attr_access |= DDI_FLAGERR_ACC; + mpt->m_reg_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; mpt->m_msg_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; mpt->m_io_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; @@ -11833,7 +11835,7 @@ ddi_fm_fini(mpt->m_dip); /* Adjust access and dma attributes for FMA */ - mpt->m_dev_acc_attr.devacc_attr_access &= ~DDI_FLAGERR_ACC; + mpt->m_reg_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; mpt->m_msg_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; mpt->m_io_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR;
--- a/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_attach.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/scsi/adapters/pmcs/pmcs_attach.c Thu Dec 03 04:39:22 2009 -0800 @@ -164,7 +164,7 @@ }; static ddi_device_acc_attr_t rattr = { - DDI_DEVICE_ATTR_V0, + DDI_DEVICE_ATTR_V1, DDI_STRUCTURE_LE_ACC, DDI_STRICTORDER_ACC, DDI_DEFAULT_ACC @@ -2947,8 +2947,7 @@ /* Only register with IO Fault Services if we have some capability */ if (pwp->fm_capabilities) { /* Adjust access and dma attributes for FMA */ - pwp->reg_acc_attr.devacc_attr_access |= DDI_FLAGERR_ACC; - pwp->dev_acc_attr.devacc_attr_access |= DDI_FLAGERR_ACC; + pwp->reg_acc_attr.devacc_attr_access = DDI_FLAGERR_ACC; pwp->iqp_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; pwp->oqp_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; pwp->cip_dma_attr.dma_attr_flags |= DDI_DMA_FLAGERR; @@ -3002,8 +3001,7 @@ ddi_fm_fini(pwp->dip); /* Adjust access and dma attributes for FMA */ - pwp->reg_acc_attr.devacc_attr_access &= ~DDI_FLAGERR_ACC; - pwp->dev_acc_attr.devacc_attr_access &= ~DDI_FLAGERR_ACC; + pwp->reg_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; pwp->iqp_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; pwp->oqp_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR; pwp->cip_dma_attr.dma_attr_flags &= ~DDI_DMA_FLAGERR;
--- a/usr/src/uts/common/io/yge/yge.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/io/yge/yge.c Thu Dec 03 04:39:22 2009 -0800 @@ -119,8 +119,7 @@ static struct ddi_device_acc_attr yge_regs_attr = { DDI_DEVICE_ATTR_V0, DDI_STRUCTURE_LE_ACC, - DDI_STRICTORDER_ACC, - DDI_FLAGERR_ACC + DDI_STRICTORDER_ACC }; static struct ddi_device_acc_attr yge_ring_attr = {
--- a/usr/src/uts/common/os/ddifm.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/os/ddifm.c Thu Dec 03 04:39:22 2009 -0800 @@ -19,7 +19,7 @@ * CDDL HEADER END */ /* - * Copyright 2008 Sun Microsystems, Inc. All rights reserved. + * Copyright 2009 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ @@ -860,6 +860,16 @@ * * These routines may be called from user, kernel, and interrupt contexts. */ + +static void +ddi_fm_acc_err_get_fail(ddi_acc_handle_t handle) +{ + ddi_acc_hdl_t *hp = impl_acc_hdl_get(handle); + + i_ddi_drv_ereport_post(hp->ah_dip, DVR_EVER, NULL, DDI_NOSLEEP); + cmn_err(CE_PANIC, "ddi_fm_acc_err_get: Invalid driver version\n"); +} + void ddi_fm_acc_err_get(ddi_acc_handle_t handle, ddi_fm_error_t *de, int version) { @@ -869,14 +879,16 @@ return; if (version != DDI_FME_VER0 && version != DDI_FME_VER1) { - ddi_acc_hdl_t *hp = impl_acc_hdl_get(handle); - - i_ddi_drv_ereport_post(hp->ah_dip, DVR_EVER, NULL, DDI_NOSLEEP); - cmn_err(CE_PANIC, "ddi_fm_acc_err_get: " - "Invalid driver version\n"); + ddi_fm_acc_err_get_fail(handle); + return; } errp = ((ddi_acc_impl_t *)handle)->ahi_err; + if (errp->err_status == DDI_FM_OK) { + if (de->fme_status != DDI_FM_OK) + de->fme_status = DDI_FM_OK; + return; + } de->fme_status = errp->err_status; de->fme_ena = errp->err_ena; de->fme_flag = errp->err_expected; @@ -884,6 +896,14 @@ } void +ddi_fm_dma_err_get_fail(ddi_dma_handle_t handle) +{ + i_ddi_drv_ereport_post(((ddi_dma_impl_t *)handle)->dmai_rdip, + DVR_EVER, NULL, DDI_NOSLEEP); + cmn_err(CE_PANIC, "ddi_fm_dma_err_get: Invalid driver version\n"); +} + +void ddi_fm_dma_err_get(ddi_dma_handle_t handle, ddi_fm_error_t *de, int version) { ndi_err_t *errp; @@ -892,14 +912,17 @@ return; if (version != DDI_FME_VER0 && version != DDI_FME_VER1) { - i_ddi_drv_ereport_post(((ddi_dma_impl_t *)handle)->dmai_rdip, - DVR_EVER, NULL, DDI_NOSLEEP); - cmn_err(CE_PANIC, "ddi_fm_dma_err_get: " - "Invalid driver version\n"); + ddi_fm_dma_err_get_fail(handle); + return; } errp = &((ddi_dma_impl_t *)handle)->dmai_error; + if (errp->err_status == DDI_FM_OK) { + if (de->fme_status != DDI_FM_OK) + de->fme_status = DDI_FM_OK; + return; + } de->fme_status = errp->err_status; de->fme_ena = errp->err_ena; de->fme_flag = errp->err_expected; @@ -907,6 +930,15 @@ } void +ddi_fm_acc_err_clear_fail(ddi_acc_handle_t handle) +{ + ddi_acc_hdl_t *hp = impl_acc_hdl_get(handle); + + i_ddi_drv_ereport_post(hp->ah_dip, DVR_EVER, NULL, DDI_NOSLEEP); + cmn_err(CE_PANIC, "ddi_fm_acc_err_clear: Invalid driver version\n"); +} + +void ddi_fm_acc_err_clear(ddi_acc_handle_t handle, int version) { ndi_err_t *errp; @@ -915,11 +947,8 @@ return; if (version != DDI_FME_VER0 && version != DDI_FME_VER1) { - ddi_acc_hdl_t *hp = impl_acc_hdl_get(handle); - - i_ddi_drv_ereport_post(hp->ah_dip, DVR_EVER, NULL, DDI_NOSLEEP); - cmn_err(CE_PANIC, "ddi_fm_acc_err_clear: " - "Invalid driver version\n"); + ddi_fm_acc_err_clear_fail(handle); + return; } errp = ((ddi_acc_impl_t *)handle)->ahi_err; @@ -929,6 +958,14 @@ } void +ddi_fm_dma_err_clear_fail(ddi_dma_handle_t handle) +{ + i_ddi_drv_ereport_post(((ddi_dma_impl_t *)handle)->dmai_rdip, + DVR_EVER, NULL, DDI_NOSLEEP); + cmn_err(CE_PANIC, "ddi_fm_dma_err_clear: Invalid driver version\n"); +} + +void ddi_fm_dma_err_clear(ddi_dma_handle_t handle, int version) { ndi_err_t *errp; @@ -937,10 +974,8 @@ return; if (version != DDI_FME_VER0 && version != DDI_FME_VER1) { - i_ddi_drv_ereport_post(((ddi_dma_impl_t *)handle)->dmai_rdip, - DVR_EVER, NULL, DDI_NOSLEEP); - cmn_err(CE_PANIC, "ddi_fm_dma_err_clear: " - "Invalid driver version\n"); + ddi_fm_dma_err_clear_fail(handle); + return; } errp = &((ddi_dma_impl_t *)handle)->dmai_error;
--- a/usr/src/uts/common/sys/scsi/adapters/mpt_sas/mptsas_var.h Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/common/sys/scsi/adapters/mpt_sas/mptsas_var.h Thu Dec 03 04:39:22 2009 -0800 @@ -722,6 +722,7 @@ ddi_dma_attr_t m_io_dma_attr; /* Used for data I/O */ ddi_dma_attr_t m_msg_dma_attr; /* Used for message frames */ ddi_device_acc_attr_t m_dev_acc_attr; + ddi_device_acc_attr_t m_reg_acc_attr; /* * request/reply variables
--- a/usr/src/uts/i86pc/io/pci/pci.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/i86pc/io/pci/pci.c Thu Dec 03 04:39:22 2009 -0800 @@ -332,17 +332,25 @@ struct regspec reg; ddi_map_req_t mr; ddi_acc_hdl_t *hp; + ddi_acc_impl_t *hdlp; pci_regspec_t pci_reg; pci_regspec_t *pci_rp; int rnumber; int length; pci_acc_cfblk_t *cfp; int space; - + pci_state_t *pcip; mr = *mp; /* Get private copy of request */ mp = &mr; + pcip = ddi_get_soft_state(pci_statep, ddi_get_instance(dip)); + hdlp = (ddi_acc_impl_t *)(mp->map_handlep)->ah_platform_private; + hdlp->ahi_err_mutexp = &pcip->pci_err_mutex; + hdlp->ahi_peekpoke_mutexp = &pcip->pci_peek_poke_mutex; + hdlp->ahi_scan_dip = dip; + hdlp->ahi_scan = pci_peekpoke_cb; + /* * check for register number */
--- a/usr/src/uts/intel/ia32/os/ddi_i86.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/intel/ia32/os/ddi_i86.c Thu Dec 03 04:39:22 2009 -0800 @@ -20,12 +20,10 @@ */ /* - * Copyright 2006 Sun Microsystems, Inc. All rights reserved. + * Copyright 2009 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/conf.h> #include <sys/kmem.h> #include <sys/ddi_impldefs.h> @@ -33,6 +31,7 @@ #include <sys/sunddi.h> #include <sys/ddifm.h> #include <sys/fm/io/ddi.h> +#include <sys/fm/protocol.h> #include <sys/ontrap.h> @@ -242,8 +241,13 @@ if (handlep->ah_acc.devacc_attr_version < DDI_DEVICE_ATTR_V1 || !DDI_FM_ACC_ERR_CAP(fmcap)) { handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; + } else if (handlep->ah_acc.devacc_attr_access == DDI_FLAGERR_ACC && + hp->ahi_scan == NULL) { + handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; } else if (DDI_FM_ACC_ERR_CAP(fmcap)) { if (handlep->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) { + if (handlep->ah_xfermodes) + return; i_ddi_drv_ereport_post(handlep->ah_dip, DVR_EFMCAP, NULL, DDI_NOSLEEP); } else { @@ -283,8 +287,15 @@ devacc_attr_access = handlep->ah_acc.devacc_attr_access; hp = (ddi_acc_impl_t *)handlep->ah_platform_private; + + /* + * Can only do FLAGERR if scan callback is set up. This should + * also guarantee that the peekpoke_mutex and err_mutex are defined. + */ + if (devacc_attr_access == DDI_FLAGERR_ACC && hp->ahi_scan == NULL) + devacc_attr_access = DDI_DEFAULT_ACC; + switch (devacc_attr_access) { - case DDI_FLAGERR_ACC: case DDI_CAUTIOUS_ACC: hp->ahi_get8 = i_ddi_caut_get8; hp->ahi_put8 = i_ddi_caut_put8; @@ -303,6 +314,96 @@ hp->ahi_rep_get64 = i_ddi_caut_rep_get64; hp->ahi_rep_put64 = i_ddi_caut_rep_put64; break; + case DDI_FLAGERR_ACC: + if (hp->ahi_acc_attr & DDI_ACCATTR_IO_SPACE) { + hp->ahi_get8 = i_ddi_prot_io_get8; + hp->ahi_put8 = i_ddi_prot_io_put8; + hp->ahi_rep_get8 = i_ddi_prot_io_rep_get8; + hp->ahi_rep_put8 = i_ddi_prot_io_rep_put8; + + /* temporary set these 64 functions to no-ops */ + hp->ahi_get64 = i_ddi_io_get64; + hp->ahi_put64 = i_ddi_io_put64; + hp->ahi_rep_get64 = i_ddi_io_rep_get64; + hp->ahi_rep_put64 = i_ddi_io_rep_put64; + + /* + * check for BIG endian access + */ + if (handlep->ah_acc.devacc_attr_endian_flags == + DDI_STRUCTURE_BE_ACC) { + hp->ahi_get16 = i_ddi_prot_io_swap_get16; + hp->ahi_get32 = i_ddi_prot_io_swap_get32; + hp->ahi_put16 = i_ddi_prot_io_swap_put16; + hp->ahi_put32 = i_ddi_prot_io_swap_put32; + hp->ahi_rep_get16 = + i_ddi_prot_io_swap_rep_get16; + hp->ahi_rep_get32 = + i_ddi_prot_io_swap_rep_get32; + hp->ahi_rep_put16 = + i_ddi_prot_io_swap_rep_put16; + hp->ahi_rep_put32 = + i_ddi_prot_io_swap_rep_put32; + } else { + hp->ahi_acc_attr |= DDI_ACCATTR_DIRECT; + hp->ahi_get16 = i_ddi_prot_io_get16; + hp->ahi_get32 = i_ddi_prot_io_get32; + hp->ahi_put16 = i_ddi_prot_io_put16; + hp->ahi_put32 = i_ddi_prot_io_put32; + hp->ahi_rep_get16 = i_ddi_prot_io_rep_get16; + hp->ahi_rep_get32 = i_ddi_prot_io_rep_get32; + hp->ahi_rep_put16 = i_ddi_prot_io_rep_put16; + hp->ahi_rep_put32 = i_ddi_prot_io_rep_put32; + } + + } else if (hp->ahi_acc_attr & DDI_ACCATTR_CPU_VADDR) { + + hp->ahi_get8 = i_ddi_prot_vaddr_get8; + hp->ahi_put8 = i_ddi_prot_vaddr_put8; + hp->ahi_rep_get8 = i_ddi_prot_vaddr_rep_get8; + hp->ahi_rep_put8 = i_ddi_prot_vaddr_rep_put8; + + /* + * check for BIG endian access + */ + if (handlep->ah_acc.devacc_attr_endian_flags == + DDI_STRUCTURE_BE_ACC) { + + hp->ahi_get16 = i_ddi_prot_vaddr_swap_get16; + hp->ahi_get32 = i_ddi_prot_vaddr_swap_get32; + hp->ahi_get64 = i_ddi_prot_vaddr_swap_get64; + hp->ahi_put16 = i_ddi_prot_vaddr_swap_put16; + hp->ahi_put32 = i_ddi_prot_vaddr_swap_put32; + hp->ahi_put64 = i_ddi_prot_vaddr_swap_put64; + hp->ahi_rep_get16 = + i_ddi_prot_vaddr_swap_rep_get16; + hp->ahi_rep_get32 = + i_ddi_prot_vaddr_swap_rep_get32; + hp->ahi_rep_get64 = + i_ddi_prot_vaddr_swap_rep_get64; + hp->ahi_rep_put16 = + i_ddi_prot_vaddr_swap_rep_put16; + hp->ahi_rep_put32 = + i_ddi_prot_vaddr_swap_rep_put32; + hp->ahi_rep_put64 = + i_ddi_prot_vaddr_swap_rep_put64; + } else { + hp->ahi_acc_attr |= DDI_ACCATTR_DIRECT; + hp->ahi_get16 = i_ddi_prot_vaddr_get16; + hp->ahi_get32 = i_ddi_prot_vaddr_get32; + hp->ahi_get64 = i_ddi_prot_vaddr_get64; + hp->ahi_put16 = i_ddi_prot_vaddr_put16; + hp->ahi_put32 = i_ddi_prot_vaddr_put32; + hp->ahi_put64 = i_ddi_prot_vaddr_put64; + hp->ahi_rep_get16 = i_ddi_prot_vaddr_rep_get16; + hp->ahi_rep_get32 = i_ddi_prot_vaddr_rep_get32; + hp->ahi_rep_get64 = i_ddi_prot_vaddr_rep_get64; + hp->ahi_rep_put16 = i_ddi_prot_vaddr_rep_put16; + hp->ahi_rep_put32 = i_ddi_prot_vaddr_rep_put32; + hp->ahi_rep_put64 = i_ddi_prot_vaddr_rep_put64; + } + } + break; case DDI_DEFAULT_ACC: if (hp->ahi_acc_attr & DDI_ACCATTR_IO_SPACE) { hp->ahi_get8 = i_ddi_io_get8; @@ -320,7 +421,7 @@ * check for BIG endian access */ if (handlep->ah_acc.devacc_attr_endian_flags == - DDI_STRUCTURE_BE_ACC) { + DDI_STRUCTURE_BE_ACC) { hp->ahi_get16 = i_ddi_io_swap_get16; hp->ahi_get32 = i_ddi_io_swap_get32; hp->ahi_put16 = i_ddi_io_swap_put16; @@ -352,7 +453,7 @@ * check for BIG endian access */ if (handlep->ah_acc.devacc_attr_endian_flags == - DDI_STRUCTURE_BE_ACC) { + DDI_STRUCTURE_BE_ACC) { hp->ahi_get16 = i_ddi_vaddr_swap_get16; hp->ahi_get32 = i_ddi_vaddr_swap_get32; @@ -813,12 +914,888 @@ } void +do_scan(ddi_acc_impl_t *hdlp) +{ + ddi_fm_error_t de; + ndi_err_t *errp = (ndi_err_t *)hdlp->ahi_err; + + bzero(&de, sizeof (ddi_fm_error_t)); + de.fme_version = DDI_FME_VERSION; + de.fme_ena = fm_ena_generate(0, FM_ENA_FMT1); + de.fme_flag = DDI_FM_ERR_UNEXPECTED; + + mutex_enter(hdlp->ahi_err_mutexp); + hdlp->ahi_scan(hdlp->ahi_scan_dip, &de); + if (de.fme_status != DDI_FM_OK) { + errp->err_ena = de.fme_ena; + errp->err_expected = de.fme_flag; + errp->err_status = DDI_FM_NONFATAL; + } + mutex_exit(hdlp->ahi_err_mutexp); +} + +/*ARGSUSED*/ +uint8_t +i_ddi_prot_vaddr_get8(ddi_acc_impl_t *hdlp, uint8_t *addr) +{ + uint8_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = *addr; + if (val == 0xff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint16_t +i_ddi_prot_vaddr_get16(ddi_acc_impl_t *hdlp, uint16_t *addr) +{ + uint16_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = *addr; + if (val == 0xffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint32_t +i_ddi_prot_vaddr_get32(ddi_acc_impl_t *hdlp, uint32_t *addr) +{ + uint32_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = *addr; + if (val == 0xffffffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint64_t +i_ddi_prot_vaddr_get64(ddi_acc_impl_t *hdlp, uint64_t *addr) +{ + uint64_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = *addr; + if (val == 0xffffffffffffffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint8_t +i_ddi_prot_io_get8(ddi_acc_impl_t *hdlp, uint8_t *addr) +{ + uint8_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = inb((uintptr_t)addr); + if (val == 0xff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint16_t +i_ddi_prot_io_get16(ddi_acc_impl_t *hdlp, uint16_t *addr) +{ + uint16_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = inw((uintptr_t)addr); + if (val == 0xffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint32_t +i_ddi_prot_io_get32(ddi_acc_impl_t *hdlp, uint32_t *addr) +{ + uint32_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = inl((uintptr_t)addr); + if (val == 0xffffffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint16_t +i_ddi_prot_vaddr_swap_get16(ddi_acc_impl_t *hdlp, uint16_t *addr) +{ + uint16_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = ddi_swap16(*addr); + if (val == 0xffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint16_t +i_ddi_prot_io_swap_get16(ddi_acc_impl_t *hdlp, uint16_t *addr) +{ + uint16_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = ddi_swap16(inw((uintptr_t)addr)); + if (val == 0xffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint32_t +i_ddi_prot_vaddr_swap_get32(ddi_acc_impl_t *hdlp, uint32_t *addr) +{ + uint32_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = ddi_swap32(*addr); + if (val == 0xffffffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint32_t +i_ddi_prot_io_swap_get32(ddi_acc_impl_t *hdlp, uint32_t *addr) +{ + uint32_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = ddi_swap32(inl((uintptr_t)addr)); + if (val == 0xffffffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +uint64_t +i_ddi_prot_vaddr_swap_get64(ddi_acc_impl_t *hdlp, uint64_t *addr) +{ + uint64_t val; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + val = ddi_swap64(*addr); + if (val == 0xffffffffffffffff) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); + + return (val); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_put8(ddi_acc_impl_t *hdlp, uint8_t *addr, uint8_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + *addr = value; + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_put8(ddi_acc_impl_t *hdlp, uint8_t *addr, uint8_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + outb((uintptr_t)addr, value); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_put16(ddi_acc_impl_t *hdlp, uint16_t *addr, uint16_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + *addr = value; + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_put16(ddi_acc_impl_t *hdlp, uint16_t *addr, uint16_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + outw((uintptr_t)addr, value); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_put32(ddi_acc_impl_t *hdlp, uint32_t *addr, + uint32_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + *addr = value; + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_put32(ddi_acc_impl_t *hdlp, uint32_t *addr, uint32_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + outl((uintptr_t)addr, value); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_put64(ddi_acc_impl_t *hdlp, uint64_t *addr, + uint64_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + *addr = value; + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_put16(ddi_acc_impl_t *hdlp, uint16_t *addr, + uint16_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + *addr = ddi_swap16(value); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_swap_put16(ddi_acc_impl_t *hdlp, uint16_t *addr, uint16_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + outw((uintptr_t)addr, ddi_swap16(value)); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_put32(ddi_acc_impl_t *hdlp, uint32_t *addr, + uint32_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + *addr = ddi_swap32(value); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_swap_put32(ddi_acc_impl_t *hdlp, uint32_t *addr, uint32_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + outl((uintptr_t)addr, ddi_swap32(value)); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_put64(ddi_acc_impl_t *hdlp, uint64_t *addr, + uint64_t value) +{ + mutex_enter(hdlp->ahi_peekpoke_mutexp); + *addr = ddi_swap64(value); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, + uint8_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint8_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--, port++) + if ((*h++ = inb(port)) == 0xff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = inb(port)) == 0xff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint16_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--, port += 2) + if ((*h++ = inw(port)) == 0xffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = inw(port)) == 0xffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint32_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--, port += 4) + if ((*h++ = inl(port)) == 0xffffffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = inl(port)) == 0xffffffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, + uint8_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint8_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--) + if ((*h++ = *d++) == 0xff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = *d) == 0xff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint16_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--) + if ((*h++ = *d++) == 0xffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = *d) == 0xffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint16_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--) + if ((*h++ = ddi_swap16(*d++)) == 0xffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = ddi_swap16(*d)) == 0xffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint16_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--, port += 2) + if ((*h++ = ddi_swap16(inw(port))) == 0xffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = ddi_swap16(inw(port))) == 0xffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint32_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--) + if ((*h++ = *d++) == 0xffffffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = *d) == 0xffffffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint32_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--) + if ((*h++ = ddi_swap32(*d++)) == 0xffffffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = ddi_swap32(*d)) == 0xffffffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint32_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--, port += 4) + if ((*h++ = ddi_swap32(inl(port))) == 0xffffffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = ddi_swap32(inl(port))) == 0xffffffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint64_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--) + if ((*h++ = *d++) == 0xffffffffffffffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = *d) == 0xffffffffffffffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags) +{ + int fail = 0; + uint64_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) { + for (; repcount; repcount--) + if ((*h++ = ddi_swap64(*d++)) == 0xffffffffffffffff) + fail = 1; + } else { + for (; repcount; repcount--) + if ((*h++ = ddi_swap64(*d)) == 0xffffffffffffffff) + fail = 1; + } + if (fail == 1) + do_scan(hdlp); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, + uint8_t *dev_addr, size_t repcount, uint_t flags) +{ + uint8_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--) + *d++ = *h++; + else + for (; repcount; repcount--) + *d = *h++; + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, + uint8_t *dev_addr, size_t repcount, uint_t flags) +{ + uint8_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--, port++) + outb(port, *h++); + else + for (; repcount; repcount--) + outb(port, *h++); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags) +{ + uint16_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--) + *d++ = *h++; + else + for (; repcount; repcount--) + *d = *h++; + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags) +{ + uint16_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--, port += 2) + outw(port, *h++); + else + for (; repcount; repcount--) + outw(port, *h++); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags) +{ + uint16_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--) + *d++ = ddi_swap16(*h++); + else + for (; repcount; repcount--) + *d = ddi_swap16(*h++); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags) +{ + uint16_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--, port += 2) + outw(port, ddi_swap16(*h++)); + else + for (; repcount; repcount--) + outw(port, ddi_swap16(*h++)); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags) +{ + uint32_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--) + *d++ = *h++; + else + for (; repcount; repcount--) + *d = *h++; + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags) +{ + uint32_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--, port += 4) + outl(port, *h++); + else + for (; repcount; repcount--) + outl(port, *h++); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags) +{ + uint32_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--) + *d++ = ddi_swap32(*h++); + else + for (; repcount; repcount--) + *d = ddi_swap32(*h++); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_io_swap_rep_put32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags) +{ + uint32_t *h; + uintptr_t port; + + h = host_addr; + port = (uintptr_t)dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--, port += 4) + outl(port, ddi_swap32(*h++)); + else + for (; repcount; repcount--) + outl(port, ddi_swap32(*h++)); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags) +{ + uint64_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--) + *d++ = *h++; + else + for (; repcount; repcount--) + *d = *h++; + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +/*ARGSUSED*/ +void +i_ddi_prot_vaddr_swap_rep_put64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags) +{ + uint64_t *h, *d; + + h = host_addr; + d = dev_addr; + + mutex_enter(hdlp->ahi_peekpoke_mutexp); + if (flags == DDI_DEV_AUTOINCR) + for (; repcount; repcount--) + *d++ = ddi_swap64(*h++); + else + for (; repcount; repcount--) + *d = ddi_swap64(*h++); + mutex_exit(hdlp->ahi_peekpoke_mutexp); +} + +void ddi_io_rep_get8(ddi_acc_handle_t handle, uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get8) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -826,8 +1803,8 @@ uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get16) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -835,8 +1812,8 @@ uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get32) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } /*ARGSUSED*/ @@ -852,8 +1829,8 @@ uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put8) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -861,8 +1838,8 @@ uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put16) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -870,8 +1847,8 @@ uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put32) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } /*ARGSUSED*/ @@ -896,8 +1873,8 @@ uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get8) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -905,8 +1882,8 @@ uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get16) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -914,8 +1891,8 @@ uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_get32) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -923,8 +1900,8 @@ uint8_t *host_addr, uint8_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put8) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -932,8 +1909,8 @@ uint16_t *host_addr, uint16_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put16) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } void @@ -941,8 +1918,8 @@ uint32_t *host_addr, uint32_t *dev_addr, size_t repcount) { (((ddi_acc_impl_t *)handle)->ahi_rep_put32) - ((ddi_acc_impl_t *)handle, host_addr, dev_addr, - repcount, DDI_DEV_NO_AUTOINCR); + ((ddi_acc_impl_t *)handle, host_addr, dev_addr, + repcount, DDI_DEV_NO_AUTOINCR); } #endif /* _ILP32 */
--- a/usr/src/uts/intel/io/pci/pci_pci.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/intel/io/pci/pci_pci.c Thu Dec 03 04:39:22 2009 -0800 @@ -448,7 +448,17 @@ off_t offset, off_t len, caddr_t *vaddrp) { dev_info_t *pdip; + ppb_devstate_t *ppb = ddi_get_soft_state(ppb_state, + ddi_get_instance(dip)); + if (strcmp(ddi_driver_name(ddi_get_parent(dip)), "npe") == 0) { + ddi_acc_impl_t *hdlp = + (ddi_acc_impl_t *)(mp->map_handlep)->ah_platform_private; + hdlp->ahi_err_mutexp = &ppb->ppb_err_mutex; + hdlp->ahi_peekpoke_mutexp = &ppb->ppb_peek_poke_mutex; + hdlp->ahi_scan_dip = dip; + hdlp->ahi_scan = ppb_peekpoke_cb; + } pdip = (dev_info_t *)DEVI(dip)->devi_parent; return ((DEVI(pdip)->devi_ops->devo_bus_ops->bus_map)(pdip, rdip, mp, offset, len, vaddrp));
--- a/usr/src/uts/intel/io/pciex/pcieb_x86.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/intel/io/pciex/pcieb_x86.c Thu Dec 03 04:39:22 2009 -0800 @@ -47,6 +47,18 @@ (void) pf_scan_fabric(dip, derr, NULL); } +void +pcieb_set_prot_scan(dev_info_t *dip, ddi_acc_impl_t *hdlp) +{ + pcieb_devstate_t *pcieb = ddi_get_soft_state(pcieb_state, + ddi_get_instance(dip)); + + hdlp->ahi_err_mutexp = &pcieb->pcieb_err_mutex; + hdlp->ahi_peekpoke_mutexp = &pcieb->pcieb_peek_poke_mutex; + hdlp->ahi_scan_dip = dip; + hdlp->ahi_scan = pcieb_peekpoke_cb; +} + int pcieb_plat_peekpoke(dev_info_t *dip, dev_info_t *rdip, ddi_ctl_enum_t ctlop, void *arg, void *result)
--- a/usr/src/uts/intel/sys/ddi_isa.h Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/intel/sys/ddi_isa.h Thu Dec 03 04:39:22 2009 -0800 @@ -19,15 +19,13 @@ * CDDL HEADER END */ /* - * Copyright 2007 Sun Microsystems, Inc. All rights reserved. + * Copyright 2009 Sun Microsystems, Inc. All rights reserved. * Use is subject to license terms. */ #ifndef _SYS_DDI_ISA_H #define _SYS_DDI_ISA_H -#pragma ident "%Z%%M% %I% %E% SMI" - #include <sys/isa_defs.h> #include <sys/dditypes.h> #include <sys/ndifm.h> @@ -117,6 +115,10 @@ void (*ahi_fault_notify)(struct ddi_acc_impl *handle); uint32_t ahi_fault; ndi_err_t *ahi_err; + kmutex_t *ahi_peekpoke_mutexp; + kmutex_t *ahi_err_mutexp; + void (*ahi_scan)(dev_info_t *, ddi_fm_error_t *); + dev_info_t *ahi_scan_dip; } ddi_acc_impl_t; @@ -326,6 +328,211 @@ uint32_t *dev_addr, size_t repcount, uint_t flags); /* + * repeat for protected mode accesses + */ + +/* + * Input functions to memory mapped IO + */ +uint8_t +i_ddi_prot_vaddr_get8(ddi_acc_impl_t *hdlp, uint8_t *addr); + +uint16_t +i_ddi_prot_vaddr_get16(ddi_acc_impl_t *hdlp, uint16_t *addr); + +uint32_t +i_ddi_prot_vaddr_get32(ddi_acc_impl_t *hdlp, uint32_t *addr); + +uint64_t +i_ddi_prot_vaddr_get64(ddi_acc_impl_t *hdlp, uint64_t *addr); + +uint16_t +i_ddi_prot_vaddr_swap_get16(ddi_acc_impl_t *hdlp, uint16_t *addr); + +uint32_t +i_ddi_prot_vaddr_swap_get32(ddi_acc_impl_t *hdlp, uint32_t *addr); + +uint64_t +i_ddi_prot_vaddr_swap_get64(ddi_acc_impl_t *hdlp, uint64_t *addr); + +/* + * Output functions to memory mapped IO + */ +void +i_ddi_prot_vaddr_put8(ddi_acc_impl_t *hdlp, uint8_t *addr, uint8_t value); + +void +i_ddi_prot_vaddr_put16(ddi_acc_impl_t *hdlp, uint16_t *addr, uint16_t value); + +void +i_ddi_prot_vaddr_put32(ddi_acc_impl_t *hdlp, uint32_t *addr, uint32_t value); + +void +i_ddi_prot_vaddr_put64(ddi_acc_impl_t *hdlp, uint64_t *addr, uint64_t value); + +void +i_ddi_prot_vaddr_swap_put16(ddi_acc_impl_t *hdlp, uint16_t *addr, + uint16_t value); + +void +i_ddi_prot_vaddr_swap_put32(ddi_acc_impl_t *hdlp, uint32_t *addr, + uint32_t value); + +void +i_ddi_prot_vaddr_swap_put64(ddi_acc_impl_t *hdlp, uint64_t *addr, + uint64_t value); + +/* + * Repeated input functions for memory mapped IO + */ +void +i_ddi_prot_vaddr_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, + uint8_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_swap_rep_get64(ddi_acc_impl_t *hdlp, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags); + +/* + * Repeated output functions for memory mapped IO + */ +void +i_ddi_prot_vaddr_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, + uint8_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_rep_put32(ddi_acc_impl_t *hdl, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_rep_put64(ddi_acc_impl_t *hdl, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_swap_rep_put32(ddi_acc_impl_t *hdl, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_vaddr_swap_rep_put64(ddi_acc_impl_t *hdl, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags); + +/* + * Input functions to IO space + */ +uint8_t +i_ddi_prot_io_get8(ddi_acc_impl_t *hdlp, uint8_t *addr); + +uint16_t +i_ddi_prot_io_get16(ddi_acc_impl_t *hdlp, uint16_t *addr); + +uint32_t +i_ddi_prot_io_get32(ddi_acc_impl_t *hdlp, uint32_t *addr); + +uint16_t +i_ddi_prot_io_swap_get16(ddi_acc_impl_t *hdlp, uint16_t *addr); + +uint32_t +i_ddi_prot_io_swap_get32(ddi_acc_impl_t *hdlp, uint32_t *addr); + +/* + * Output functions to IO space + */ +void +i_ddi_prot_io_put8(ddi_acc_impl_t *hdlp, uint8_t *addr, uint8_t value); + +void +i_ddi_prot_io_put16(ddi_acc_impl_t *hdlp, uint16_t *addr, uint16_t value); + +void +i_ddi_prot_io_put32(ddi_acc_impl_t *hdlp, uint32_t *addr, uint32_t value); + +void +i_ddi_prot_io_put64(ddi_acc_impl_t *hdlp, uint64_t *addr, uint64_t value); + +void +i_ddi_prot_io_swap_put16(ddi_acc_impl_t *hdlp, uint16_t *addr, uint16_t value); + +void +i_ddi_prot_io_swap_put32(ddi_acc_impl_t *hdlp, uint32_t *addr, uint32_t value); + +/* + * Repeated input functions for IO space + */ +void +i_ddi_prot_io_rep_get8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, + uint8_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_io_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_io_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_io_swap_rep_get16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_io_swap_rep_get32(ddi_acc_impl_t *hdlp, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags); + +/* + * Repeated output functions for IO space + */ +void +i_ddi_prot_io_rep_put8(ddi_acc_impl_t *hdlp, uint8_t *host_addr, + uint8_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_io_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_io_rep_put32(ddi_acc_impl_t *hdl, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_io_rep_put64(ddi_acc_impl_t *hdl, uint64_t *host_addr, + uint64_t *dev_addr, size_t repcount, uint_t flags); +void +i_ddi_prot_io_swap_rep_put16(ddi_acc_impl_t *hdlp, uint16_t *host_addr, + uint16_t *dev_addr, size_t repcount, uint_t flags); + +void +i_ddi_prot_io_swap_rep_put32(ddi_acc_impl_t *hdl, uint32_t *host_addr, + uint32_t *dev_addr, size_t repcount, uint_t flags); + +/* * Default fault-checking and notification functions */ int
--- a/usr/src/uts/sparc/io/pciex/pcieb_sparc.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/sparc/io/pciex/pcieb_sparc.c Thu Dec 03 04:39:22 2009 -0800 @@ -56,6 +56,12 @@ /*ARGSUSED*/ void +pcieb_set_prot_scan(dev_info_t *dip, ddi_acc_impl_t *hdlp) +{ +} + +/*ARGSUSED*/ +void pcieb_plat_attach_workaround(dev_info_t *dip) { }
--- a/usr/src/uts/sun4/os/ddi_impl.c Thu Dec 03 01:41:29 2009 -0800 +++ b/usr/src/uts/sun4/os/ddi_impl.c Thu Dec 03 04:39:22 2009 -0800 @@ -1403,6 +1403,8 @@ handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; } else if (DDI_FM_ACC_ERR_CAP(fmcap)) { if (handlep->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) { + if (handlep->ah_xfermodes) + return; i_ddi_drv_ereport_post(handlep->ah_dip, DVR_EFMCAP, NULL, DDI_NOSLEEP); } else {