Mercurial > illumos > illumos-gate
changeset 2946:2211d99f898b
6453862 On Panther, L3$ Address Parity error is not handled correctly
| author | mb91622 |
|---|---|
| date | Thu, 19 Oct 2006 17:24:48 -0700 |
| parents | e0fa035619a8 |
| children | 490e4976e8af |
| files | usr/src/uts/sun4u/cpu/us3_cheetahplus.c usr/src/uts/sun4u/sys/us3_module.h |
| diffstat | 2 files changed, 8 insertions(+), 2 deletions(-) [+] |
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--- a/usr/src/uts/sun4u/cpu/us3_cheetahplus.c Thu Oct 19 14:29:42 2006 -0700 +++ b/usr/src/uts/sun4u/cpu/us3_cheetahplus.c Thu Oct 19 17:24:48 2006 -0700 @@ -398,6 +398,11 @@ cpu_async_log_tlb_parity_err(flt); return (CH_ASYNC_LOG_DONE); + /* report the error and continue */ + case CPU_L3_ADDR_PE: + cpu_log_err(aflt); + return (CH_ASYNC_LOG_DONE); + default: return (CH_ASYNC_LOG_UNKNOWN); }
--- a/usr/src/uts/sun4u/sys/us3_module.h Thu Oct 19 14:29:42 2006 -0700 +++ b/usr/src/uts/sun4u/sys/us3_module.h Thu Oct 19 17:24:48 2006 -0700 @@ -293,10 +293,11 @@ C_AFSR_EXT_FECC_ERRS | C_AFSR_EXT_CECC_ERRS | \ C_AFSR_EXT_ASYNC_ERRS | C_AFSR_L3_MECC) -/* Panther AFSR_EXT bits due to L3 cache data errors */ +/* Panther AFSR_EXT bits for errors to report a L3 cache data resource */ #define C_AFSR_EXT_L3_DATA_ERRS (C_AFSR_L3_WDU | C_AFSR_L3_WDC | \ C_AFSR_L3_CPU | C_AFSR_L3_CPC | C_AFSR_L3_UCU | \ - C_AFSR_L3_UCC | C_AFSR_L3_EDU | C_AFSR_L3_EDC) + C_AFSR_L3_UCC | C_AFSR_L3_EDU | C_AFSR_L3_EDC | \ + C_AFSR_L3_MECC) /* Panther AFSR_EXT bits with a valid ESYND field */ #define C_AFSR_EXT_ESYND_ERRS (C_AFSR_L3_UCU | C_AFSR_L3_UCC | \