Mercurial > illumos > illumos-gate
changeset 5125:43f30c4f3307
6591788 Need nxge 32bit driver for x86 to support PXE boot
6550650 SUNWnxge.i whines on upgrade
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--- a/usr/src/pkgdefs/SUNWnxge.i/postinstall Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/pkgdefs/SUNWnxge.i/postinstall Mon Sep 24 21:51:25 2007 -0700 @@ -73,9 +73,6 @@ echo "\nFailed add_drv!\n" >&2 exit 1 fi -else - echo " add_drv Failed; ${DRV} is already in ${BASEDIR}/etc/name_to_major" - exit 0 fi exit 0
--- a/usr/src/pkgdefs/SUNWnxge.i/prototype_i386 Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/pkgdefs/SUNWnxge.i/prototype_i386 Mon Sep 24 21:51:25 2007 -0700 @@ -53,6 +53,7 @@ d none platform/i86pc 755 root sys d none platform/i86pc/kernel 755 root sys d none platform/i86pc/kernel/drv 755 root sys +f none platform/i86pc/kernel/drv/nxge 755 root sys e renameold platform/i86pc/kernel/drv/nxge.conf 0644 root sys d none platform/i86pc/kernel/drv/amd64 755 root sys f none platform/i86pc/kernel/drv/amd64/nxge 755 root sys
--- a/usr/src/pkgdefs/SUNWnxge.u/postinstall Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/pkgdefs/SUNWnxge.u/postinstall Mon Sep 24 21:51:25 2007 -0700 @@ -73,9 +73,6 @@ echo "\nFailed add_drv!\n" >&2 exit 1 fi -else - echo " add_drv Failed; ${DRV} is already in ${BASEDIR}/etc/name_to_major" - exit 0 fi exit 0
--- a/usr/src/pkgdefs/SUNWnxge.v/postinstall Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/pkgdefs/SUNWnxge.v/postinstall Mon Sep 24 21:51:25 2007 -0700 @@ -73,9 +73,6 @@ echo "\nFailed add_drv!\n" >&2 exit 1 fi -else - echo " add_drv Failed; ${DRV} is already in ${BASEDIR}/etc/name_to_major" - exit 0 fi exit 0
--- a/usr/src/uts/common/io/nxge/npi/npi_ipp.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/npi/npi_ipp.c Mon Sep 24 21:51:25 2007 -0700 @@ -121,7 +121,11 @@ num_regs = sizeof (ipp_fzc_offset) / sizeof (uint64_t); for (i = 0; i < num_regs; i++) { offset = IPP_REG_ADDR(port, ipp_fzc_offset[i]); +#if defined(__i386) + NXGE_REG_RD64(handle, (uint32_t)offset, &value); +#else NXGE_REG_RD64(handle, offset, &value); +#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "0x%08llx " "%s\t 0x%08llx \n", offset, ipp_fzc_name[i], value)); @@ -147,7 +151,11 @@ num_regs = sizeof (ipp_fzc_offset) / sizeof (uint64_t); for (i = 0; i < num_regs; i++) { offset = IPP_REG_ADDR(port, ipp_fzc_offset[i]); +#if defined(__i386) + NXGE_REG_RD64(handle, (uint32_t)offset, &value); +#else NXGE_REG_RD64(handle, offset, &value); +#endif } }
--- a/usr/src/uts/common/io/nxge/npi/npi_mac.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/npi/npi_mac.c Mon Sep 24 21:51:25 2007 -0700 @@ -516,7 +516,12 @@ "\nXMAC Register Dump for port %d\n", port)); for (i = 0; i < num_regs; i++) { +#if defined(__i386) + XMAC_REG_RD(handle, port, (uint32_t)xmac_offset[i], + &value); +#else XMAC_REG_RD(handle, port, xmac_offset[i], &value); +#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "%08llx %s\t %08llx \n", (XMAC_REG_ADDR((port), (xmac_offset[i]))), @@ -535,7 +540,12 @@ "\nBMAC Register Dump for port %d\n", port)); for (i = 0; i < num_regs; i++) { +#if defined(__i386) + BMAC_REG_RD(handle, port, (uint32_t)bmac_offset[i], + &value); +#else BMAC_REG_RD(handle, port, bmac_offset[i], &value); +#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "%08llx %s\t %08llx \n", (BMAC_REG_ADDR((port), (bmac_offset[i]))),
--- a/usr/src/uts/common/io/nxge/npi/npi_txdma.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/npi/npi_txdma.c Mon Sep 24 21:51:25 2007 -0700 @@ -142,7 +142,12 @@ num_regs = NUM_TDC_DMC_REGS; for (i = 0; i < num_regs; i++) { +#if defined(__i386) + TXDMA_REG_READ64(handle, (uint32_t)tdc_dmc_offset[i], tdc, + &value); +#else TXDMA_REG_READ64(handle, tdc_dmc_offset[i], tdc, &value); +#endif offset = NXGE_TXDMA_OFFSET(tdc_dmc_offset[i], handle.is_vraddr, tdc); NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "0x%08llx " @@ -158,7 +163,11 @@ num_regs = NUM_TX_FZC_REGS; for (i = 0; i < num_regs; i++) { offset = NXGE_TXLOG_OFFSET(tdc_fzc_offset[i], tdc); +#if defined(__i386) + NXGE_REG_RD64(handle, (uint32_t)offset, &value); +#else NXGE_REG_RD64(handle, offset, &value); +#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "0x%08llx " "%s\t %016llx \n", offset, tdc_fzc_name[i], @@ -196,7 +205,11 @@ num_regs = NUM_TX_FZC_REGS; for (i = 0; i < num_regs; i++) { +#if defined(__i386) + NXGE_REG_RD64(handle, (uint32_t)tx_fzc_offset[i], &value); +#else NXGE_REG_RD64(handle, tx_fzc_offset[i], &value); +#endif NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL, "0x%08llx " "%s\t 0x%08llx \n", tx_fzc_offset[i], @@ -230,8 +243,12 @@ num_regs = NUM_TDC_DMC_REGS; value = 0; for (i = 0; i < num_regs; i++) { - TXDMA_REG_WRITE64(handle, tdc_dmc_offset[i], tdc, +#if defined(__i386) + TXDMA_REG_WRITE64(handle, (uint32_t)tdc_dmc_offset[i], tdc, value); +#else + TXDMA_REG_WRITE64(handle, tdc_dmc_offset[i], tdc, value); +#endif } NPI_REG_DUMP_MSG((handle.function, NPI_REG_CTL,
--- a/usr/src/uts/common/io/nxge/nxge_fflp.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_fflp.c Mon Sep 24 21:51:25 2007 -0700 @@ -1838,7 +1838,11 @@ /* configure vlan tables */ pa = (p_nxge_param_t)&nxgep->param_arr[param_vlan_2rdc_grp]; +#if defined(__i386) + val_ptr = (uint64_t *)(uint32_t)pa->value; +#else val_ptr = (uint64_t *)pa->value; +#endif cfgd_vlans = ((pa->type & NXGE_PARAM_ARRAY_CNT_MASK) >> NXGE_PARAM_ARRAY_CNT_SHIFT); @@ -1858,7 +1862,11 @@ /* config MAC addresses */ num_macs = p_cfgp->max_macs; pa = (p_nxge_param_t)&nxgep->param_arr[param_mac_2rdc_grp]; +#if defined(__i386) + val_ptr = (uint64_t *)(uint32_t)pa->value; +#else val_ptr = (uint64_t *)pa->value; +#endif for (alt_mac = 0; alt_mac < num_macs; alt_mac++) { if (p_class_cfgp->mac_host_info[alt_mac].flag) {
--- a/usr/src/uts/common/io/nxge/nxge_mac.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_mac.c Mon Sep 24 21:51:25 2007 -0700 @@ -2301,12 +2301,20 @@ bmcr.value = 0; bmcr.bits.reset = 1; if ((status = nxge_mii_write(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)&mii_regs->bmcr, bmcr.value)) != NXGE_OK) +#else (uint8_t)(uint64_t)&mii_regs->bmcr, bmcr.value)) != NXGE_OK) +#endif goto fail; do { drv_usecwait(500); if ((status = nxge_mii_read(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)&mii_regs->bmcr, &bmcr.value)) +#else (uint8_t)(uint64_t)&mii_regs->bmcr, &bmcr.value)) +#endif != NXGE_OK) goto fail; delay++; @@ -2317,7 +2325,11 @@ } if ((status = nxge_mii_read(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->bmsr), +#else (uint8_t)(uint64_t)(&mii_regs->bmsr), +#endif &bmsr.value)) != NXGE_OK) goto fail; @@ -2362,7 +2374,11 @@ */ if (bmsr.bits.extend_status) { if ((status = nxge_mii_read(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->esr), &esr.value)) +#else (uint8_t)(uint64_t)(&mii_regs->esr), &esr.value)) +#endif != NXGE_OK) goto fail; param_arr[param_anar_1000fdx].value &= @@ -2399,7 +2415,11 @@ */ bmcr.value = 0; if ((status = nxge_mii_write(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->bmcr), bmcr.value)) != NXGE_OK) +#else (uint8_t)(uint64_t)(&mii_regs->bmcr), bmcr.value)) != NXGE_OK) +#endif goto fail; if ((statsp->port_stats.lb_mode == nxge_lb_phy) || @@ -2450,7 +2470,11 @@ } if ((status = nxge_mii_write(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->anar), anar.value)) +#else (uint8_t)(uint64_t)(&mii_regs->anar), anar.value)) +#endif != NXGE_OK) goto fail; if (bmsr.bits.extend_status) { @@ -2464,7 +2488,11 @@ gcr.bits.link_1000hdx = param_arr[param_anar_1000hdx].value; if ((status = nxge_mii_write(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->gcr), gcr.value)) +#else (uint8_t)(uint64_t)(&mii_regs->gcr), gcr.value)) +#endif != NXGE_OK) goto fail; } @@ -2488,7 +2516,11 @@ gcr.bits.master = param_arr[param_master_cfg_value].value; if ((status = nxge_mii_write(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->gcr), +#else (uint8_t)(uint64_t)(&mii_regs->gcr), +#endif gcr.value)) != NXGE_OK) goto fail; @@ -2528,7 +2560,11 @@ gcr.bits.ms_mode_en = 1; gcr.bits.master = 1; if ((status = nxge_mii_write(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->gcr), +#else (uint8_t)(uint64_t)(&mii_regs->gcr), +#endif gcr.value)) != NXGE_OK) goto fail; @@ -2553,12 +2589,20 @@ } if ((status = nxge_mii_write(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->bmcr), +#else (uint8_t)(uint64_t)(&mii_regs->bmcr), +#endif bmcr.value)) != NXGE_OK) goto fail; if ((status = nxge_mii_read(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->bmcr), &bmcr.value)) != NXGE_OK) +#else (uint8_t)(uint64_t)(&mii_regs->bmcr), &bmcr.value)) != NXGE_OK) +#endif goto fail; NXGE_DEBUG_MSG((nxgep, MAC_CTL, "bmcr = 0x%04X", bmcr.value)); @@ -2568,7 +2612,11 @@ nxgep->soft_bmsr.value = 0; if ((status = nxge_mii_read(nxgep, xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->bmsr), +#else (uint8_t)(uint64_t)(&mii_regs->bmsr), +#endif &nxgep->bmsr.value)) != NXGE_OK) goto fail; @@ -2801,17 +2849,29 @@ if (param_arr[param_autoneg].value) { if ((status = nxge_mii_read(nxgep, statsp->mac_stats.xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->anar), +#else (uint8_t)(uint64_t)(&mii_regs->anar), +#endif &anar.value)) != NXGE_OK) goto fail; if ((status = nxge_mii_read(nxgep, statsp->mac_stats.xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->anlpar), +#else (uint8_t)(uint64_t)(&mii_regs->anlpar), +#endif &anlpar.value)) != NXGE_OK) goto fail; if ((status = nxge_mii_read(nxgep, statsp->mac_stats.xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->aner), +#else (uint8_t)(uint64_t)(&mii_regs->aner), +#endif &aner.value)) != NXGE_OK) goto fail; statsp->mac_stats.lp_cap_autoneg = aner.bits.lp_an_able; @@ -2830,7 +2890,11 @@ param_arr[param_anar_1000hdx].value) { if ((status = nxge_mii_read(nxgep, statsp->mac_stats.xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->gsr), +#else (uint8_t)(uint64_t)(&mii_regs->gsr), +#endif &gsr.value)) != NXGE_OK) goto fail; @@ -3157,7 +3221,11 @@ default: if ((status = nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->bmsr), +#else (uint8_t)(uint64_t)(&mii_regs->bmsr), +#endif &bmsr_data.value)) != NXGE_OK) { goto fail; } @@ -3165,12 +3233,20 @@ if (nxgep->param_arr[param_autoneg].value) { if ((status = nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->gsr), +#else (uint8_t)(uint64_t)(&mii_regs->gsr), +#endif &gsr.value)) != NXGE_OK) goto fail; if ((status = nxge_mii_read(nxgep, nxgep->statsp->mac_stats.xcvr_portn, +#if defined(__i386) + (uint8_t)(uint32_t)(&mii_regs->anlpar), +#else (uint8_t)(uint64_t)(&mii_regs->anlpar), +#endif &anlpar.value)) != NXGE_OK) goto fail; if (nxgep->statsp->mac_stats.link_up &&
--- a/usr/src/uts/common/io/nxge/nxge_main.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_main.c Mon Sep 24 21:51:25 2007 -0700 @@ -1443,7 +1443,11 @@ void nxge_get64(p_nxge_t nxgep, p_mblk_t mp) { +#if defined(__i386) + size_t reg; +#else uint64_t reg; +#endif uint64_t regdata; int i, retry; @@ -1460,7 +1464,11 @@ void nxge_put64(p_nxge_t nxgep, p_mblk_t mp) { +#if defined(__i386) + size_t reg; +#else uint64_t reg; +#endif uint64_t buf[2]; bcopy((char *)mp->b_rptr, (char *)&buf[0], 2 * sizeof (uint64_t)); @@ -2896,9 +2904,18 @@ dma_p->kaddrp = kaddrp; dma_p->last_kaddrp = (unsigned char *)kaddrp + dma_p->alength - RXBUF_64B_ALIGNED; +#if defined(__i386) + dma_p->ioaddr_pp = + (unsigned char *)(uint32_t)dma_p->dma_cookie.dmac_laddress; +#else dma_p->ioaddr_pp = (unsigned char *)dma_p->dma_cookie.dmac_laddress; +#endif dma_p->last_ioaddr_pp = +#if defined(__i386) + (unsigned char *)(uint32_t)dma_p->dma_cookie.dmac_laddress + +#else (unsigned char *)dma_p->dma_cookie.dmac_laddress + +#endif dma_p->alength - RXBUF_64B_ALIGNED; NPI_DMA_ACC_HANDLE_SET(dma_p, dma_p->acc_handle);
--- a/usr/src/uts/common/io/nxge/nxge_ndd.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_ndd.c Mon Sep 24 21:51:25 2007 -0700 @@ -574,7 +574,12 @@ if (prop_len > NXGE_PARAM_ARRAY_INIT_SIZE) prop_len = NXGE_PARAM_ARRAY_INIT_SIZE; +#if defined(__i386) + cfg_value = + (uint32_t *)(int32_t)param_arr[i].value; +#else cfg_value = (uint32_t *)param_arr[i].value; +#endif for (j = 0; j < prop_len; j++) { cfg_value[j] = int_prop_val[j]; } @@ -761,9 +766,19 @@ alloc_count = NXGE_PARAM_ARRAY_INIT_SIZE; alloc_size = alloc_count * sizeof (uint64_t); param_arr[i].value = +#if defined(__i386) + (uint64_t)(uint32_t)KMEM_ZALLOC(alloc_size, + KM_SLEEP); +#else (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); +#endif param_arr[i].old_value = - (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); +#if defined(__i386) + (uint64_t)(uint32_t)KMEM_ZALLOC(alloc_size, + KM_SLEEP); +#else + (uint64_t)KMEM_ZALLOC(alloc_size, KM_SLEEP); +#endif param_arr[i].type |= (alloc_count << NXGE_PARAM_ARRAY_ALLOC_SHIFT); } @@ -807,9 +822,19 @@ NXGE_PARAM_ARRAY_ALLOC_SHIFT); free_count = NXGE_PARAM_ARRAY_INIT_SIZE; free_size = sizeof (uint64_t) * free_count; +#if defined(__i386) + KMEM_FREE((void *)(uint32_t)nxgep->param_arr[i].value, + free_size); +#else KMEM_FREE((void *)nxgep->param_arr[i].value, free_size); +#endif +#if defined(__i386) + KMEM_FREE((void *)(uint32_t) + nxgep->param_arr[i].old_value, free_size); +#else KMEM_FREE((void *)nxgep->param_arr[i].old_value, free_size); +#endif } KMEM_FREE(nxgep->param_arr, sizeof (nxge_param_arr)); @@ -1297,8 +1322,16 @@ NXGE_DEBUG_MSG((nxgep, NDD_CTL, " nxge_param_set_mac_rdcgrp mapping" " id %d grp %d", mac_map->param_id, mac_map->map_to)); +#if defined(__i386) + val_ptr = (uint32_t *)(uint32_t)pa->value; +#else val_ptr = (uint32_t *)pa->value; +#endif +#if defined(__i386) + old_val_ptr = (uint32_t *)(uint32_t)pa->old_value; +#else old_val_ptr = (uint32_t *)pa->old_value; +#endif if (val_ptr[mac_map->param_id] != cfg_value) { old_val_ptr[mac_map->param_id] = val_ptr[mac_map->param_id]; @@ -1374,8 +1407,16 @@ "nxge_param_set_vlan_rdcgrp mapping" " id %d grp %d", vmap->param_id, vmap->map_to)); +#if defined(__i386) + val_ptr = (uint32_t *)(uint32_t)pa->value; +#else val_ptr = (uint32_t *)pa->value; +#endif +#if defined(__i386) + old_val_ptr = (uint32_t *)(uint32_t)pa->old_value; +#else old_val_ptr = (uint32_t *)pa->old_value; +#endif /* search to see if this vlan id is already configured */ for (i = 0; i < cfgd_vlans; i++) { @@ -1483,8 +1524,11 @@ " Prefernce\n", i); ((mblk_t *)np)->b_wptr += print_len; buf_len -= print_len; - +#if defined(__i386) + val_ptr = (uint32_t *)(uint32_t)pa->value; +#else val_ptr = (uint32_t *)pa->value; +#endif for (i = 0; i < cfgd_vlans; i++) { vmap = (nxge_param_map_t *)&val_ptr[i]; @@ -2245,7 +2289,11 @@ ADVANCE_PRINT_BUFFER(np, print_len, buf_len); block = 0; +#if defined(__i386) + base = (uint64_t)(uint32_t)nxgep->dev_regs->nxge_regp; +#else base = (uint64_t)nxgep->dev_regs->nxge_regp; +#endif while (reg_block[block].offset != ALL_FF_32) { print_len = snprintf((char *)((mblk_t *)np)->b_wptr, buf_len, "%9s\t 0x%llx\n",
--- a/usr/src/uts/common/io/nxge/nxge_rxdma.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_rxdma.c Mon Sep 24 21:51:25 2007 -0700 @@ -579,8 +579,11 @@ "==> nxge_rxbuf_pp_to_vp: buf_pp $%p btype %d", pkt_buf_addr_pp, pktbufsz_type)); - +#if defined(__i386) + pktbuf_pp = (uint64_t)(uint32_t)pkt_buf_addr_pp; +#else pktbuf_pp = (uint64_t)pkt_buf_addr_pp; +#endif switch (pktbufsz_type) { case 0: @@ -808,9 +811,13 @@ total_index, dvma_addr, offset, block_size, block_index)); - - *pkt_buf_addr_p = (uint64_t *)((uint64_t)bufinfo[anchor_index].kaddr - + offset); +#if defined(__i386) + *pkt_buf_addr_p = (uint64_t *)((uint32_t)bufinfo[anchor_index].kaddr + + (uint32_t)offset); +#else + *pkt_buf_addr_p = (uint64_t *)((uint64_t)bufinfo[anchor_index].kaddr + + (uint64_t)offset); +#endif NXGE_DEBUG_MSG((nxgep, RX2_CTL, "==> nxge_rxbuf_pp_to_vp: " @@ -1029,7 +1036,11 @@ hd_addr.addr = 0; (void) npi_rxdma_rdc_rbr_head_get(handle, rdc, &hd_addr); printf("nxge_rxdma_regs_dump: got hdptr $%p \n", +#if defined(__i386) + (void *)(uint32_t)hd_addr.addr); +#else (void *)hd_addr.addr); +#endif /* RBR stats */ (void) npi_rxdma_rdc_rbr_stat_get(handle, rdc, &rbr_stat); @@ -1039,7 +1050,11 @@ tail_addr.addr = 0; (void) npi_rxdma_rdc_rcr_tail_get(handle, rdc, &tail_addr); printf("nxge_rxdma_regs_dump: got tail ptr $%p \n", +#if defined(__i386) + (void *)(uint32_t)tail_addr.addr); +#else (void *)tail_addr.addr); +#endif /* RCR qlen */ (void) npi_rxdma_rdc_rcr_qlen_get(handle, rdc, &qlen); @@ -2103,9 +2118,13 @@ pktbufsz_type = ((rcr_entry & RCR_PKTBUFSZ_MASK) >> RCR_PKTBUFSZ_SHIFT); - +#if defined(__i386) + pkt_buf_addr_pp = (uint64_t *)(uint32_t)((rcr_entry & + RCR_PKT_BUF_ADDR_MASK) << RCR_PKT_BUF_ADDR_SHIFT); +#else pkt_buf_addr_pp = (uint64_t *)((rcr_entry & RCR_PKT_BUF_ADDR_MASK) << RCR_PKT_BUF_ADDR_SHIFT); +#endif channel = rcr_p->rdc; @@ -2149,8 +2168,13 @@ l2_len -= ETHERFCSL; /* shift 6 bits to get the full io address */ +#if defined(__i386) + pkt_buf_addr_pp = (uint64_t *)((uint32_t)pkt_buf_addr_pp << + RCR_PKT_BUF_ADDR_SHIFT_FULL); +#else pkt_buf_addr_pp = (uint64_t *)((uint64_t)pkt_buf_addr_pp << RCR_PKT_BUF_ADDR_SHIFT_FULL); +#endif NXGE_DEBUG_MSG((nxgep, RX2_CTL, "==> (rbr) nxge_receive_packet: entry 0x%0llx " "full pkt_buf_addr_pp $%p l2_len %d", @@ -3295,7 +3319,11 @@ rcrp->rcr_desc_rd_head_p = rcrp->rcr_desc_first_p = (p_rcr_entry_t)DMA_COMMON_VPTR(rcrp->rcr_desc); rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = +#if defined(__i386) + (p_rcr_entry_t)(uint32_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); +#else (p_rcr_entry_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); +#endif rcrp->rcr_desc_last_p = rcrp->rcr_desc_rd_head_p + (nxge_port_rcr_size - 1); @@ -3518,11 +3546,19 @@ for (i = 0; i < rbrp->num_blocks; i++, dma_bufp++) { bsize = dma_bufp->block_size; nblocks = dma_bufp->nblocks; +#if defined(__i386) + ring_info->buffer[i].dvma_addr = (uint32_t)dma_bufp->ioaddr_pp; +#else ring_info->buffer[i].dvma_addr = (uint64_t)dma_bufp->ioaddr_pp; +#endif ring_info->buffer[i].buf_index = i; ring_info->buffer[i].buf_size = dma_bufp->alength; ring_info->buffer[i].start_index = index; +#if defined(__i386) + ring_info->buffer[i].kaddr = (uint32_t)dma_bufp->kaddrp; +#else ring_info->buffer[i].kaddr = (uint64_t)dma_bufp->kaddrp; +#endif NXGE_DEBUG_MSG((nxgep, MEM2_CTL, " nxge_map_rxdma_channel_buf_ring: map channel %d " @@ -4244,7 +4280,11 @@ rcrp->rcr_desc_rd_head_p = rcrp->rcr_desc_first_p = (p_rcr_entry_t)DMA_COMMON_VPTR(rcrp->rcr_desc); rcrp->rcr_desc_rd_head_pp = rcrp->rcr_desc_first_pp = +#if defined(__i386) + (p_rcr_entry_t)(uint32_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); +#else (p_rcr_entry_t)DMA_COMMON_IOADDR(rcrp->rcr_desc); +#endif rcrp->rcr_desc_last_p = rcrp->rcr_desc_rd_head_p + (nxge_port_rcr_size - 1); @@ -4447,8 +4487,13 @@ cs.bits.hdw.rbrlogpage = 1; else if (err_id == NXGE_FM_EREPORT_RDMC_CFIGLOGPAGE) cs.bits.hdw.cfiglogpage = 1; +#if defined(__i386) + cmn_err(CE_NOTE, "!Write 0x%llx to RX_DMA_CTL_STAT_DBG_REG\n", + cs.value); +#else cmn_err(CE_NOTE, "!Write 0x%lx to RX_DMA_CTL_STAT_DBG_REG\n", cs.value); +#endif RXDMA_REG_WRITE64(nxgep->npi_handle, RX_DMA_CTL_STAT_DBG_REG, chan, cs.value); break; @@ -4462,9 +4507,15 @@ cdfs.bits.ldw.zcp_eop_err = (1 << nxgep->mac.portnum); else if (err_id == NXGE_FM_EREPORT_RDMC_IPP_EOP_ERR) cdfs.bits.ldw.ipp_eop_err = (1 << nxgep->mac.portnum); +#if defined(__i386) + cmn_err(CE_NOTE, + "!Write 0x%llx to RX_CTL_DAT_FIFO_STAT_DBG_REG\n", + cdfs.value); +#else cmn_err(CE_NOTE, "!Write 0x%lx to RX_CTL_DAT_FIFO_STAT_DBG_REG\n", cdfs.value); +#endif RXDMA_REG_WRITE64(nxgep->npi_handle, RX_CTL_DAT_FIFO_STAT_DBG_REG, chan, cdfs.value); break;
--- a/usr/src/uts/common/io/nxge/nxge_send.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_send.c Mon Sep 24 21:51:25 2007 -0700 @@ -268,7 +268,11 @@ tx_desc_pp = &tx_desc_ring_pp[i]; #endif tx_msg_p = &tx_msg_ring[i]; +#if defined(__i386) + npi_desc_handle.regp = (uint32_t)tx_desc_p; +#else npi_desc_handle.regp = (uint64_t)tx_desc_p; +#endif if (!header_set && ((!nxge_tx_use_bcopy && (len > TX_BCOPY_SIZE)) || (len >= bcopy_thresh))) { @@ -435,8 +439,11 @@ "ngathers %d", len, clen, ngathers)); - +#if defined(__i386) + npi_desc_handle.regp = (uint32_t)tx_desc_p; +#else npi_desc_handle.regp = (uint64_t)tx_desc_p; +#endif while (ncookies > 1) { ngathers++; /* @@ -484,7 +491,11 @@ tx_desc_p = &tx_desc_ring_vp[i]; npi_desc_handle.regp = +#if defined(__i386) + (uint32_t)tx_desc_p; +#else (uint64_t)tx_desc_p; +#endif tx_msg_p = &tx_msg_ring[i]; tx_msg_p->flags.dma_type = USE_NONE; tx_desc.value = 0; @@ -509,7 +520,11 @@ nmp = nmp->b_cont; nxge_start_control_header_only: +#if defined(__i386) + npi_desc_handle.regp = (uint32_t)tx_desc_p; +#else npi_desc_handle.regp = (uint64_t)tx_desc_p; +#endif ngathers++; if (ngathers == 1) { @@ -589,7 +604,11 @@ tx_msg_p->tx_message = mp; tx_desc_p = &tx_desc_ring_vp[sop_index]; +#if defined(__i386) + npi_desc_handle.regp = (uint32_t)tx_desc_p; +#else npi_desc_handle.regp = (uint64_t)tx_desc_p; +#endif pkthdrp = (p_tx_pkt_hdr_all_t)hdrp; pkthdrp->reserved = 0; @@ -799,7 +818,11 @@ NXGE_DEBUG_MSG((nxgep, TX_CTL, "==> nxge_start: clean up")); for (i = 0; i < ngathers; i++) { tx_desc_p = &tx_desc_ring_vp[cur_index]; +#if defined(__i386) + npi_handle.regp = (uint32_t)tx_desc_p; +#else npi_handle.regp = (uint64_t)tx_desc_p; +#endif tx_msg_p = &tx_msg_ring[cur_index]; (void) npi_txdma_desc_set_zero(npi_handle, 1); if (tx_msg_p->flags.dma_type == USE_DVMA) { @@ -1035,7 +1058,11 @@ case NXGE_TX_LB_HASH: if (hp->hash) { +#if defined(__i386) + ring_index = ((uint32_t)(hp->hash) % maxtdcs); +#else ring_index = ((uint64_t)(hp->hash) % maxtdcs); +#endif } else { ring_index = mp->b_band % maxtdcs; }
--- a/usr/src/uts/common/io/nxge/nxge_txc.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_txc.c Mon Sep 24 21:51:25 2007 -0700 @@ -362,8 +362,13 @@ ro_ecc_ctl.bits.ldw.single_bit_err = 1; else ro_ecc_ctl.bits.ldw.double_bit_err = 1; +#if defined(__i386) + cmn_err(CE_NOTE, "!Write 0x%llx to TXC_ROECC_CTL_REG\n", + ro_ecc_ctl.value); +#else cmn_err(CE_NOTE, "!Write 0x%lx to TXC_ROECC_CTL_REG\n", ro_ecc_ctl.value); +#endif TXC_FZC_CNTL_REG_WRITE64(nxgep->npi_handle, TXC_ROECC_CTL_REG, portn, ro_ecc_ctl.value); break; @@ -376,8 +381,13 @@ sf_ecc_ctl.bits.ldw.single_bit_err = 1; else sf_ecc_ctl.bits.ldw.double_bit_err = 1; +#if defined(__i386) + cmn_err(CE_NOTE, "!Write 0x%llx to TXC_SFECC_CTL_REG\n", + sf_ecc_ctl.value); +#else cmn_err(CE_NOTE, "!Write 0x%lx to TXC_SFECC_CTL_REG\n", sf_ecc_ctl.value); +#endif TXC_FZC_CNTL_REG_WRITE64(nxgep->npi_handle, TXC_SFECC_CTL_REG, portn, sf_ecc_ctl.value); break; @@ -386,8 +396,13 @@ &txcs.value); nxge_txc_inject_port_err(portn, &txcs, TXC_INT_STAT_REORDER_ERR); +#if defined(__i386) + cmn_err(CE_NOTE, "!Write 0x%llx to TXC_INT_STAT_DBG_REG\n", + txcs.value); +#else cmn_err(CE_NOTE, "!Write 0x%lx to TXC_INT_STAT_DBG_REG\n", txcs.value); +#endif NXGE_REG_WR64(nxgep->npi_handle, TXC_INT_STAT_DBG_REG, txcs.value); break;
--- a/usr/src/uts/common/io/nxge/nxge_txdma.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_txdma.c Mon Sep 24 21:51:25 2007 -0700 @@ -1783,7 +1783,11 @@ ipp_status_t status; (void) npi_ipp_get_status(handle, nxgep->function_num, &status); +#if defined(__i386) + printf("\n\tIPP status 0x%llux\n", (uint64_t)status.value); +#else printf("\n\tIPP status 0x%lux\n", (uint64_t)status.value); +#endif } } @@ -3273,8 +3277,13 @@ tdi.bits.ldw.conf_part_err = 1; else if (err_id == NXGE_FM_EREPORT_TDMC_PKT_PRT_ERR) tdi.bits.ldw.pkt_part_err = 1; +#if defined(__i386) + cmn_err(CE_NOTE, "!Write 0x%llx to TDMC_INTR_DBG_REG\n", + tdi.value); +#else cmn_err(CE_NOTE, "!Write 0x%lx to TDMC_INTR_DBG_REG\n", tdi.value); +#endif TXDMA_REG_WRITE64(nxgep->npi_handle, TDMC_INTR_DBG_REG, chan, tdi.value);
--- a/usr/src/uts/common/io/nxge/nxge_zcp.c Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/io/nxge/nxge_zcp.c Mon Sep 24 21:51:25 2007 -0700 @@ -372,8 +372,13 @@ zcps.bits.ldw.slv_tt_index_err = 1; if (err_id == NXGE_FM_EREPORT_ZCP_TT_INDEX_ERR) zcps.bits.ldw.zcp_tt_index_err = 1; +#if defined(__i386) + cmn_err(CE_NOTE, "!Write 0x%llx to ZCP_INT_STAT_TEST_REG\n", + zcps.value); +#else cmn_err(CE_NOTE, "!Write 0x%lx to ZCP_INT_STAT_TEST_REG\n", zcps.value); +#endif NXGE_REG_WR64(nxgep->npi_handle, ZCP_INT_STAT_TEST_REG, zcps.value); break;
--- a/usr/src/uts/common/sys/nxge/nxge_common_impl.h Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/common/sys/nxge/nxge_common_impl.h Mon Sep 24 21:51:25 2007 -0700 @@ -159,7 +159,11 @@ typedef ddi_acc_handle_t nxge_os_acc_handle_t; typedef nxge_os_acc_handle_t npi_reg_handle_t; -typedef uint64_t npi_reg_ptr_t; +#if defined(__i386) +typedef uint32_t npi_reg_ptr_t; +#else +typedef uint64_t npi_reg_ptr_t; +#endif typedef ddi_dma_handle_t nxge_os_dma_handle_t; typedef struct _nxge_dma_common_t nxge_os_dma_common_t; @@ -222,9 +226,15 @@ (ddi_get32(NPI_REGH(npi_handle), \ (uint32_t *)(NPI_REGP(npi_handle) + offset))) +#if defined(__i386) +#define NXGE_NPI_PIO_READ64(npi_handle, offset) \ + (ddi_get64(NPI_REGH(npi_handle), \ + (uint64_t *)(NPI_REGP(npi_handle) + (uint32_t)offset))) +#else #define NXGE_NPI_PIO_READ64(npi_handle, offset) \ (ddi_get64(NPI_REGH(npi_handle), \ (uint64_t *)(NPI_REGP(npi_handle) + offset))) +#endif #define NXGE_NPI_PIO_WRITE8(npi_handle, offset, data) \ (ddi_put8(NPI_REGH(npi_handle), \ @@ -238,9 +248,15 @@ (ddi_put32(NPI_REGH(npi_handle), \ (uint32_t *)(NPI_REGP(npi_handle) + offset), data)) +#if defined(__i386) +#define NXGE_NPI_PIO_WRITE64(npi_handle, offset, data) \ + (ddi_put64(NPI_REGH(npi_handle), \ + (uint64_t *)(NPI_REGP(npi_handle) + (uint32_t)offset), data)) +#else #define NXGE_NPI_PIO_WRITE64(npi_handle, offset, data) \ (ddi_put64(NPI_REGH(npi_handle), \ (uint64_t *)(NPI_REGP(npi_handle) + offset), data)) +#endif #define NXGE_MEM_PIO_READ8(npi_handle) \ (ddi_get8(NPI_REGH(npi_handle), (uint8_t *)NPI_REGP(npi_handle)))
--- a/usr/src/uts/i86pc/nxge/Makefile Mon Sep 24 14:51:26 2007 -0700 +++ b/usr/src/uts/i86pc/nxge/Makefile Mon Sep 24 21:51:25 2007 -0700 @@ -80,10 +80,9 @@ # CFLAGS += -DSOLARIS # -# Only build 64-bit version. -ALL_BUILDS = $(ALL_BUILDS64) -DEF_BUILDS = $(DEF_BUILDS64) -CLEANLINTFILES += $(LINT64_FILES) +#ALL_BUILDS = $(ALL_BUILDS64) +#DEF_BUILDS = $(DEF_BUILDS64) +#CLEANLINTFILES += $(LINT64_FILES) # LINTFLAGS += -DSOLARIS #