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0
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1 /*
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2 * CDDL HEADER START
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3 *
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4 * The contents of this file are subject to the terms of the
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5 * Common Development and Distribution License, Version 1.0 only
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6 * (the "License"). You may not use this file except in compliance
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7 * with the License.
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8 *
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9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
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10 * or http://www.opensolaris.org/os/licensing.
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11 * See the License for the specific language governing permissions
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12 * and limitations under the License.
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13 *
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14 * When distributing Covered Code, include this CDDL HEADER in each
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15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
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16 * If applicable, add the following below this CDDL HEADER, with the
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17 * fields enclosed by brackets "[]" replaced with your own identifying
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18 * information: Portions Copyright [yyyy] [name of copyright owner]
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19 *
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20 * CDDL HEADER END
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21 */
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22 /*
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23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved.
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24 * Use is subject to license terms.
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25 */
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26
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27 /* Copyright (c) 1984, 1986, 1987, 1988, 1989 AT&T */
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28 /* All Rights Reserved */
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29
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30
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31 #pragma ident "%Z%%M% %I% %E% SMI"
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32
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33 #include <sys/param.h>
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34 #include <sys/types.h>
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35 #include <sys/vmparam.h>
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36 #include <sys/systm.h>
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37 #include <sys/signal.h>
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38 #include <sys/stack.h>
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39 #include <sys/regset.h>
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40 #include <sys/privregs.h>
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41 #include <sys/frame.h>
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42 #include <sys/proc.h>
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43 #include <sys/psw.h>
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44 #include <sys/siginfo.h>
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45 #include <sys/cpuvar.h>
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46 #include <sys/asm_linkage.h>
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47 #include <sys/kmem.h>
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48 #include <sys/errno.h>
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49 #include <sys/bootconf.h>
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50 #include <sys/archsystm.h>
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51 #include <sys/debug.h>
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52 #include <sys/elf.h>
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53 #include <sys/spl.h>
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54 #include <sys/time.h>
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55 #include <sys/atomic.h>
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56 #include <sys/sysmacros.h>
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57 #include <sys/cmn_err.h>
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58 #include <sys/modctl.h>
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59 #include <sys/kobj.h>
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60 #include <sys/panic.h>
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61 #include <sys/reboot.h>
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62 #include <sys/time.h>
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63 #include <sys/fp.h>
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64 #include <sys/x86_archext.h>
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65 #include <sys/auxv.h>
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66 #include <sys/auxv_386.h>
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67 #include <sys/dtrace.h>
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68
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69 extern const struct fnsave_state x87_initial;
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70 extern const struct fxsave_state sse_initial;
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71
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72 /*
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73 * Map an fnsave-formatted save area into an fxsave-formatted save area.
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74 *
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75 * Most fields are the same width, content and semantics. However
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76 * the tag word is compressed.
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77 */
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78 static void
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79 fnsave_to_fxsave(const struct fnsave_state *fn, struct fxsave_state *fx)
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80 {
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81 uint_t i, tagbits;
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82
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83 fx->fx_fcw = fn->f_fcw;
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84 fx->fx_fsw = fn->f_fsw;
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85
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86 /*
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87 * copy element by element (because of holes)
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88 */
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89 for (i = 0; i < 8; i++)
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90 bcopy(&fn->f_st[i].fpr_16[0], &fx->fx_st[i].fpr_16[0],
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91 sizeof (fn->f_st[0].fpr_16)); /* 80-bit x87-style floats */
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92
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93 /*
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94 * synthesize compressed tag bits
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95 */
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96 fx->fx_fctw = 0;
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97 for (tagbits = fn->f_ftw, i = 0; i < 8; i++, tagbits >>= 2)
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98 if ((tagbits & 3) != 3)
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99 fx->fx_fctw |= (1 << i);
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100
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101 fx->fx_fop = fn->f_fop;
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102
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103 #if defined(__amd64)
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104 fx->fx_rip = (uint64_t)fn->f_eip;
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105 fx->fx_rdp = (uint64_t)fn->f_dp;
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106 #else
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107 fx->fx_eip = fn->f_eip;
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108 fx->fx_cs = fn->f_cs;
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109 fx->__fx_ign0 = 0;
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110 fx->fx_dp = fn->f_dp;
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111 fx->fx_ds = fn->f_ds;
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112 fx->__fx_ign1 = 0;
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113 #endif
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114 }
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115
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116 /*
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117 * Map from an fxsave-format save area to an fnsave-format save area.
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118 */
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119 static void
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120 fxsave_to_fnsave(const struct fxsave_state *fx, struct fnsave_state *fn)
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121 {
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122 uint_t i, top, tagbits;
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123
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124 fn->f_fcw = fx->fx_fcw;
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125 fn->__f_ign0 = 0;
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126 fn->f_fsw = fx->fx_fsw;
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127 fn->__f_ign1 = 0;
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128
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129 top = (fx->fx_fsw & FPS_TOP) >> 11;
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130
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131 /*
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132 * copy element by element (because of holes)
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133 */
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134 for (i = 0; i < 8; i++)
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135 bcopy(&fx->fx_st[i].fpr_16[0], &fn->f_st[i].fpr_16[0],
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136 sizeof (fn->f_st[0].fpr_16)); /* 80-bit x87-style floats */
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137
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138 /*
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139 * synthesize uncompressed tag bits
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140 */
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141 fn->f_ftw = 0;
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142 for (tagbits = fx->fx_fctw, i = 0; i < 8; i++, tagbits >>= 1) {
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143 uint_t ibit, expo;
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144 const uint16_t *fpp;
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145 static const uint16_t zero[5] = { 0, 0, 0, 0, 0 };
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146
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147 if ((tagbits & 1) == 0) {
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148 fn->f_ftw |= 3 << (i << 1); /* empty */
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149 continue;
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150 }
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151
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152 /*
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153 * (tags refer to *physical* registers)
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154 */
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155 fpp = &fx->fx_st[(i - top + 8) & 7].fpr_16[0];
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156 ibit = fpp[3] >> 15;
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157 expo = fpp[4] & 0x7fff;
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158
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159 if (ibit && expo != 0 && expo != 0x7fff)
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160 continue; /* valid fp number */
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161
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162 if (bcmp(fpp, &zero, sizeof (zero)))
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163 fn->f_ftw |= 2 << (i << 1); /* NaN */
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164 else
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165 fn->f_ftw |= 1 << (i << 1); /* fp zero */
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166 }
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167
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168 fn->f_fop = fx->fx_fop;
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169
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170 fn->__f_ign2 = 0;
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171 #if defined(__amd64)
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172 fn->f_eip = (uint32_t)fx->fx_rip;
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173 fn->f_cs = U32CS_SEL;
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174 fn->f_dp = (uint32_t)fx->fx_rdp;
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175 fn->f_ds = UDS_SEL;
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176 #else
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177 fn->f_eip = fx->fx_eip;
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178 fn->f_cs = fx->fx_cs;
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179 fn->f_dp = fx->fx_dp;
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180 fn->f_ds = fx->fx_ds;
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181 #endif
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182 fn->__f_ign3 = 0;
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183 }
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184
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185 /*
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186 * Map from an fpregset_t into an fxsave-format save area
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187 */
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188 static void
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189 fpregset_to_fxsave(const fpregset_t *fp, struct fxsave_state *fx)
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190 {
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191 #if defined(__amd64)
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192 bcopy(fp, fx, sizeof (*fx));
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193 #else
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194 const struct fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
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195
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196 fnsave_to_fxsave((const struct fnsave_state *)fc, fx);
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197 fx->fx_mxcsr = fc->mxcsr;
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198 bcopy(&fc->xmm[0], &fx->fx_xmm[0], sizeof (fc->xmm));
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199 #endif
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200 /*
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201 * avoid useless #gp exceptions - mask reserved bits
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202 */
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203 fx->fx_mxcsr &= sse_mxcsr_mask;
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204 }
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205
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206 /*
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207 * Map from an fxsave-format save area into a fpregset_t
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208 */
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209 static void
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210 fxsave_to_fpregset(const struct fxsave_state *fx, fpregset_t *fp)
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211 {
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212 #if defined(__amd64)
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213 bcopy(fx, fp, sizeof (*fx));
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214 #else
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215 struct fpchip_state *fc = &fp->fp_reg_set.fpchip_state;
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216
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217 fxsave_to_fnsave(fx, (struct fnsave_state *)fc);
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218 fc->mxcsr = fx->fx_mxcsr;
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219 bcopy(&fx->fx_xmm[0], &fc->xmm[0], sizeof (fc->xmm));
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220 #endif
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221 }
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222
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223 #if defined(_SYSCALL32_IMPL)
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224 static void
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225 fpregset32_to_fxsave(const fpregset32_t *fp, struct fxsave_state *fx)
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226 {
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227 const struct fpchip32_state *fc = &fp->fp_reg_set.fpchip_state;
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228
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229 fnsave_to_fxsave((const struct fnsave_state *)fc, fx);
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230 /*
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231 * avoid useless #gp exceptions - mask reserved bits
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232 */
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233 fx->fx_mxcsr = sse_mxcsr_mask & fc->mxcsr;
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234 bcopy(&fc->xmm[0], &fx->fx_xmm[0], sizeof (fc->xmm));
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235 }
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236
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237 static void
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238 fxsave_to_fpregset32(const struct fxsave_state *fx, fpregset32_t *fp)
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239 {
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240 struct fpchip32_state *fc = &fp->fp_reg_set.fpchip_state;
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241
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242 fxsave_to_fnsave(fx, (struct fnsave_state *)fc);
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243 fc->mxcsr = fx->fx_mxcsr;
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244 bcopy(&fx->fx_xmm[0], &fc->xmm[0], sizeof (fc->xmm));
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245 }
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246
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247 static void
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248 fpregset_nto32(const fpregset_t *src, fpregset32_t *dst)
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249 {
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250 fxsave_to_fpregset32((struct fxsave_state *)src, dst);
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251 dst->fp_reg_set.fpchip_state.status =
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252 src->fp_reg_set.fpchip_state.status;
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253 dst->fp_reg_set.fpchip_state.xstatus =
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254 src->fp_reg_set.fpchip_state.xstatus;
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255 }
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256
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257 static void
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258 fpregset_32ton(const fpregset32_t *src, fpregset_t *dst)
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259 {
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260 fpregset32_to_fxsave(src, (struct fxsave_state *)dst);
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261 dst->fp_reg_set.fpchip_state.status =
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262 src->fp_reg_set.fpchip_state.status;
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263 dst->fp_reg_set.fpchip_state.xstatus =
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264 src->fp_reg_set.fpchip_state.xstatus;
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265 }
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266 #endif
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267
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268 /*
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269 * Set floating-point registers from a native fpregset_t.
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270 */
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271 void
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272 setfpregs(klwp_t *lwp, fpregset_t *fp)
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273 {
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274 struct fpu_ctx *fpu = &lwp->lwp_pcb.pcb_fpu;
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275
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276 if (fpu->fpu_flags & FPU_EN) {
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277 if (!(fpu->fpu_flags & FPU_VALID)) {
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278 /*
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279 * FPU context is still active, release the
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280 * ownership.
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281 */
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282 fp_free(fpu, 0);
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283 }
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284 #if !defined(__amd64)
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285 if (fp_kind == __FP_SSE) {
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286 #endif
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287 fpregset_to_fxsave(fp, &fpu->fpu_regs.kfpu_u.kfpu_fx);
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288 fpu->fpu_regs.kfpu_xstatus =
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289 fp->fp_reg_set.fpchip_state.xstatus;
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290 #if !defined(__amd64)
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291 } else
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292 bcopy(fp, &fpu->fpu_regs.kfpu_u.kfpu_fn,
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293 sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn));
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294 #endif
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295 fpu->fpu_regs.kfpu_status = fp->fp_reg_set.fpchip_state.status;
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296 fpu->fpu_flags |= FPU_VALID;
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297
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298 /*
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299 * If we are changing the fpu_flags in the current context,
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300 * disable floating point (turn on CR0_TS bit) to track
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301 * FPU_VALID after clearing any errors (frstor chokes
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302 * otherwise)
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303 */
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304 if (lwp == ttolwp(curthread)) {
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305 (void) fperr_reset();
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306 fpdisable();
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307 }
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308 } else {
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309 /*
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310 * If we are trying to change the FPU state of a thread which
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311 * hasn't yet initialized floating point, store the state in
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312 * the pcb and indicate that the state is valid. When the
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313 * thread enables floating point, it will use this state instead
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314 * of the default state.
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315 */
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316 #if !defined(__amd64)
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317 if (fp_kind == __FP_SSE) {
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318 #endif
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319 fpregset_to_fxsave(fp, &fpu->fpu_regs.kfpu_u.kfpu_fx);
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320 fpu->fpu_regs.kfpu_xstatus =
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321 fp->fp_reg_set.fpchip_state.xstatus;
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322 #if !defined(__amd64)
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323 } else
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324 bcopy(fp, &fpu->fpu_regs.kfpu_u.kfpu_fn,
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325 sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn));
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326 #endif
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327 fpu->fpu_regs.kfpu_status = fp->fp_reg_set.fpchip_state.status;
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328 fpu->fpu_flags |= FPU_VALID;
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329 }
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330 }
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331
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332 /*
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333 * Get floating-point registers into a native fpregset_t.
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334 */
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335 void
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336 getfpregs(klwp_t *lwp, fpregset_t *fp)
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337 {
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338 struct fpu_ctx *fpu = &lwp->lwp_pcb.pcb_fpu;
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339
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340 kpreempt_disable();
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341 if (fpu->fpu_flags & FPU_EN) {
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342 /*
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343 * If we have FPU hw and the thread's pcb doesn't have
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344 * a valid FPU state then get the state from the hw.
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345 */
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346 if (fpu_exists && ttolwp(curthread) == lwp &&
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347 !(fpu->fpu_flags & FPU_VALID))
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348 fp_save(fpu); /* get the current FPU state */
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349 }
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350
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351 /*
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352 * There are 3 possible cases we have to be aware of here:
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353 *
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354 * 1. FPU is enabled. FPU state is stored in the current LWP.
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355 *
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356 * 2. FPU is not enabled, and there have been no intervening /proc
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357 * modifications. Return initial FPU state.
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358 *
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359 * 3. FPU is not enabled, but a /proc consumer has modified FPU state.
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360 * FPU state is stored in the current LWP.
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361 */
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362 if ((fpu->fpu_flags & FPU_EN) || (fpu->fpu_flags & FPU_VALID)) {
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363 /*
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364 * Cases 1 and 3.
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365 */
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366 #if !defined(__amd64)
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367 if (fp_kind == __FP_SSE) {
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368 #endif
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369 fxsave_to_fpregset(&fpu->fpu_regs.kfpu_u.kfpu_fx, fp);
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370 fp->fp_reg_set.fpchip_state.xstatus =
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371 fpu->fpu_regs.kfpu_xstatus;
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372 #if !defined(__amd64)
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373 } else
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374 bcopy(&fpu->fpu_regs.kfpu_u.kfpu_fn, fp,
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375 sizeof (fpu->fpu_regs.kfpu_u.kfpu_fn));
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376 #endif
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377 fp->fp_reg_set.fpchip_state.status = fpu->fpu_regs.kfpu_status;
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378 } else {
|
|
|
379 /*
|
|
|
380 * Case 2.
|
|
|
381 */
|
|
|
382 #if !defined(__amd64)
|
|
|
383 if (fp_kind == __FP_SSE) {
|
|
|
384 #endif
|
|
|
385 fxsave_to_fpregset(&sse_initial, fp);
|
|
|
386 fp->fp_reg_set.fpchip_state.xstatus =
|
|
|
387 fpu->fpu_regs.kfpu_xstatus;
|
|
|
388 #if !defined(__amd64)
|
|
|
389 } else
|
|
|
390 bcopy(&x87_initial, fp, sizeof (x87_initial));
|
|
|
391 #endif
|
|
|
392 fp->fp_reg_set.fpchip_state.status = fpu->fpu_regs.kfpu_status;
|
|
|
393 }
|
|
|
394 kpreempt_enable();
|
|
|
395 }
|
|
|
396
|
|
|
397 #if defined(_SYSCALL32_IMPL)
|
|
|
398
|
|
|
399 /*
|
|
|
400 * Set floating-point registers from an fpregset32_t.
|
|
|
401 */
|
|
|
402 void
|
|
|
403 setfpregs32(klwp_t *lwp, fpregset32_t *fp)
|
|
|
404 {
|
|
|
405 fpregset_t fpregs;
|
|
|
406
|
|
|
407 fpregset_32ton(fp, &fpregs);
|
|
|
408 setfpregs(lwp, &fpregs);
|
|
|
409 }
|
|
|
410
|
|
|
411 /*
|
|
|
412 * Get floating-point registers into an fpregset32_t.
|
|
|
413 */
|
|
|
414 void
|
|
|
415 getfpregs32(klwp_t *lwp, fpregset32_t *fp)
|
|
|
416 {
|
|
|
417 fpregset_t fpregs;
|
|
|
418
|
|
|
419 getfpregs(lwp, &fpregs);
|
|
|
420 fpregset_nto32(&fpregs, fp);
|
|
|
421 }
|
|
|
422
|
|
|
423 #endif /* _SYSCALL32_IMPL */
|
|
|
424
|
|
|
425 /*
|
|
|
426 * Return the general registers
|
|
|
427 */
|
|
|
428 void
|
|
|
429 getgregs(klwp_t *lwp, gregset_t grp)
|
|
|
430 {
|
|
|
431 struct regs *rp = lwptoregs(lwp);
|
|
|
432 #if defined(__amd64)
|
|
|
433 struct pcb *pcb = &lwp->lwp_pcb;
|
|
|
434 int thisthread = lwptot(lwp) == curthread;
|
|
|
435
|
|
|
436 grp[REG_RDI] = rp->r_rdi;
|
|
|
437 grp[REG_RSI] = rp->r_rsi;
|
|
|
438 grp[REG_RDX] = rp->r_rdx;
|
|
|
439 grp[REG_RCX] = rp->r_rcx;
|
|
|
440 grp[REG_R8] = rp->r_r8;
|
|
|
441 grp[REG_R9] = rp->r_r9;
|
|
|
442 grp[REG_RAX] = rp->r_rax;
|
|
|
443 grp[REG_RBX] = rp->r_rbx;
|
|
|
444 grp[REG_RBP] = rp->r_rbp;
|
|
|
445 grp[REG_R10] = rp->r_r10;
|
|
|
446 grp[REG_R11] = rp->r_r11;
|
|
|
447 grp[REG_R12] = rp->r_r12;
|
|
|
448 grp[REG_R13] = rp->r_r13;
|
|
|
449 grp[REG_R14] = rp->r_r14;
|
|
|
450 grp[REG_R15] = rp->r_r15;
|
|
|
451 grp[REG_FSBASE] = pcb->pcb_fsbase;
|
|
|
452 grp[REG_GSBASE] = pcb->pcb_gsbase;
|
|
|
453 if (thisthread)
|
|
|
454 kpreempt_disable();
|
|
|
455 if (pcb->pcb_flags & RUPDATE_PENDING) {
|
|
|
456 grp[REG_DS] = pcb->pcb_ds;
|
|
|
457 grp[REG_ES] = pcb->pcb_es;
|
|
|
458 grp[REG_FS] = pcb->pcb_fs;
|
|
|
459 grp[REG_GS] = pcb->pcb_gs;
|
|
|
460 } else {
|
|
|
461 grp[REG_DS] = rp->r_ds;
|
|
|
462 grp[REG_ES] = rp->r_es;
|
|
|
463 grp[REG_FS] = rp->r_fs;
|
|
|
464 grp[REG_GS] = rp->r_gs;
|
|
|
465 }
|
|
|
466 if (thisthread)
|
|
|
467 kpreempt_enable();
|
|
|
468 grp[REG_TRAPNO] = rp->r_trapno;
|
|
|
469 grp[REG_ERR] = rp->r_err;
|
|
|
470 grp[REG_RIP] = rp->r_rip;
|
|
|
471 grp[REG_CS] = rp->r_cs;
|
|
|
472 grp[REG_SS] = rp->r_ss;
|
|
|
473 grp[REG_RFL] = rp->r_rfl;
|
|
|
474 grp[REG_RSP] = rp->r_rsp;
|
|
|
475 #else
|
|
|
476 bcopy(&rp->r_gs, grp, sizeof (gregset_t));
|
|
|
477 #endif
|
|
|
478 }
|
|
|
479
|
|
|
480 #if defined(_SYSCALL32_IMPL)
|
|
|
481
|
|
|
482 void
|
|
|
483 getgregs32(klwp_t *lwp, gregset32_t grp)
|
|
|
484 {
|
|
|
485 struct regs *rp = lwptoregs(lwp);
|
|
|
486 struct pcb *pcb = &lwp->lwp_pcb;
|
|
|
487 int thisthread = lwptot(lwp) == curthread;
|
|
|
488
|
|
|
489 if (thisthread)
|
|
|
490 kpreempt_disable();
|
|
|
491 if (pcb->pcb_flags & RUPDATE_PENDING) {
|
|
|
492 grp[GS] = (uint16_t)pcb->pcb_gs;
|
|
|
493 grp[FS] = (uint16_t)pcb->pcb_fs;
|
|
|
494 grp[DS] = (uint16_t)pcb->pcb_ds;
|
|
|
495 grp[ES] = (uint16_t)pcb->pcb_es;
|
|
|
496 } else {
|
|
|
497 grp[GS] = (uint16_t)rp->r_gs;
|
|
|
498 grp[FS] = (uint16_t)rp->r_fs;
|
|
|
499 grp[DS] = (uint16_t)rp->r_ds;
|
|
|
500 grp[ES] = (uint16_t)rp->r_es;
|
|
|
501 }
|
|
|
502 if (thisthread)
|
|
|
503 kpreempt_enable();
|
|
|
504 grp[EDI] = (greg32_t)rp->r_rdi;
|
|
|
505 grp[ESI] = (greg32_t)rp->r_rsi;
|
|
|
506 grp[EBP] = (greg32_t)rp->r_rbp;
|
|
|
507 grp[ESP] = 0;
|
|
|
508 grp[EBX] = (greg32_t)rp->r_rbx;
|
|
|
509 grp[EDX] = (greg32_t)rp->r_rdx;
|
|
|
510 grp[ECX] = (greg32_t)rp->r_rcx;
|
|
|
511 grp[EAX] = (greg32_t)rp->r_rax;
|
|
|
512 grp[TRAPNO] = (greg32_t)rp->r_trapno;
|
|
|
513 grp[ERR] = (greg32_t)rp->r_err;
|
|
|
514 grp[EIP] = (greg32_t)rp->r_rip;
|
|
|
515 grp[CS] = (uint16_t)rp->r_cs;
|
|
|
516 grp[EFL] = (greg32_t)rp->r_rfl;
|
|
|
517 grp[UESP] = (greg32_t)rp->r_rsp;
|
|
|
518 grp[SS] = (uint16_t)rp->r_ss;
|
|
|
519 }
|
|
|
520
|
|
|
521 void
|
|
|
522 ucontext_32ton(const ucontext32_t *src, ucontext_t *dst)
|
|
|
523 {
|
|
|
524 mcontext_t *dmc = &dst->uc_mcontext;
|
|
|
525 const mcontext32_t *smc = &src->uc_mcontext;
|
|
|
526
|
|
|
527 bzero(dst, sizeof (*dst));
|
|
|
528 dst->uc_flags = src->uc_flags;
|
|
|
529 dst->uc_link = (ucontext_t *)(uintptr_t)src->uc_link;
|
|
|
530
|
|
|
531 bcopy(&src->uc_sigmask, &dst->uc_sigmask, sizeof (dst->uc_sigmask));
|
|
|
532
|
|
|
533 dst->uc_stack.ss_sp = (void *)(uintptr_t)src->uc_stack.ss_sp;
|
|
|
534 dst->uc_stack.ss_size = (size_t)src->uc_stack.ss_size;
|
|
|
535 dst->uc_stack.ss_flags = src->uc_stack.ss_flags;
|
|
|
536
|
|
|
537 dmc->gregs[REG_GS] = (greg_t)(uint32_t)smc->gregs[GS];
|
|
|
538 dmc->gregs[REG_FS] = (greg_t)(uint32_t)smc->gregs[FS];
|
|
|
539 dmc->gregs[REG_ES] = (greg_t)(uint32_t)smc->gregs[ES];
|
|
|
540 dmc->gregs[REG_DS] = (greg_t)(uint32_t)smc->gregs[DS];
|
|
|
541 dmc->gregs[REG_RDI] = (greg_t)(uint32_t)smc->gregs[EDI];
|
|
|
542 dmc->gregs[REG_RSI] = (greg_t)(uint32_t)smc->gregs[ESI];
|
|
|
543 dmc->gregs[REG_RBP] = (greg_t)(uint32_t)smc->gregs[EBP];
|
|
|
544 dmc->gregs[REG_RBX] = (greg_t)(uint32_t)smc->gregs[EBX];
|
|
|
545 dmc->gregs[REG_RDX] = (greg_t)(uint32_t)smc->gregs[EDX];
|
|
|
546 dmc->gregs[REG_RCX] = (greg_t)(uint32_t)smc->gregs[ECX];
|
|
|
547 dmc->gregs[REG_RAX] = (greg_t)(uint32_t)smc->gregs[EAX];
|
|
|
548 dmc->gregs[REG_TRAPNO] = (greg_t)(uint32_t)smc->gregs[TRAPNO];
|
|
|
549 dmc->gregs[REG_ERR] = (greg_t)(uint32_t)smc->gregs[ERR];
|
|
|
550 dmc->gregs[REG_RIP] = (greg_t)(uint32_t)smc->gregs[EIP];
|
|
|
551 dmc->gregs[REG_CS] = (greg_t)(uint32_t)smc->gregs[CS];
|
|
|
552 dmc->gregs[REG_RFL] = (greg_t)(uint32_t)smc->gregs[EFL];
|
|
|
553 dmc->gregs[REG_RSP] = (greg_t)(uint32_t)smc->gregs[UESP];
|
|
|
554 dmc->gregs[REG_SS] = (greg_t)(uint32_t)smc->gregs[SS];
|
|
|
555
|
|
|
556 /*
|
|
|
557 * A valid fpregs is only copied in if uc.uc_flags has UC_FPU set
|
|
|
558 * otherwise there is no guarantee that anything in fpregs is valid.
|
|
|
559 */
|
|
|
560 if (src->uc_flags & UC_FPU)
|
|
|
561 fpregset_32ton(&src->uc_mcontext.fpregs,
|
|
|
562 &dst->uc_mcontext.fpregs);
|
|
|
563 }
|
|
|
564
|
|
|
565 #endif /* _SYSCALL32_IMPL */
|
|
|
566
|
|
|
567 /*
|
|
|
568 * Return the user-level PC.
|
|
|
569 * If in a system call, return the address of the syscall trap.
|
|
|
570 */
|
|
|
571 greg_t
|
|
|
572 getuserpc()
|
|
|
573 {
|
|
|
574 greg_t upc = lwptoregs(ttolwp(curthread))->r_pc;
|
|
|
575 uint32_t insn;
|
|
|
576
|
|
|
577 if (curthread->t_sysnum == 0)
|
|
|
578 return (upc);
|
|
|
579
|
|
|
580 /*
|
|
|
581 * We might've gotten here from sysenter (0xf 0x34),
|
|
|
582 * syscall (0xf 0x5) or lcall (0x9a 0 0 0 0 0x27 0).
|
|
|
583 *
|
|
|
584 * Go peek at the binary to figure it out..
|
|
|
585 */
|
|
|
586 if (fuword32((void *)(upc - 2), &insn) != -1 &&
|
|
|
587 (insn & 0xffff) == 0x340f || (insn & 0xffff) == 0x050f)
|
|
|
588 return (upc - 2);
|
|
|
589 return (upc - 7);
|
|
|
590 }
|
|
|
591
|
|
|
592 /*
|
|
|
593 * Protect segment registers from non-user privilege levels and GDT selectors
|
|
|
594 * other than USER_CS, USER_DS and lwp FS and GS values. If the segment
|
|
|
595 * selector is non-null and not USER_CS/USER_DS, we make sure that the
|
|
|
596 * TI bit is set to point into the LDT and that the RPL is set to 3.
|
|
|
597 *
|
|
|
598 * Since struct regs stores each 16-bit segment register as a 32-bit greg_t, we
|
|
|
599 * also explicitly zero the top 16 bits since they may be coming from the
|
|
|
600 * user's address space via setcontext(2) or /proc.
|
|
|
601 */
|
|
|
602
|
|
|
603 /*ARGSUSED*/
|
|
|
604 static greg_t
|
|
|
605 fix_segreg(greg_t sr, model_t datamodel)
|
|
|
606 {
|
|
|
607 switch (sr &= 0xffff) {
|
|
|
608 #if defined(__amd64)
|
|
|
609 /*
|
|
|
610 * If lwp attempts to switch data model then force their
|
|
|
611 * code selector to be null selector.
|
|
|
612 */
|
|
|
613 case U32CS_SEL:
|
|
|
614 if (datamodel == DATAMODEL_NATIVE)
|
|
|
615 return (0);
|
|
|
616 else
|
|
|
617 return (sr);
|
|
|
618
|
|
|
619 case UCS_SEL:
|
|
|
620 if (datamodel == DATAMODEL_ILP32)
|
|
|
621 return (0);
|
|
|
622 #elif defined(__i386)
|
|
|
623 case UCS_SEL:
|
|
|
624 #endif
|
|
|
625 /*FALLTHROUGH*/
|
|
|
626 case UDS_SEL:
|
|
|
627 case LWPFS_SEL:
|
|
|
628 case LWPGS_SEL:
|
|
|
629 case 0:
|
|
|
630 return (sr);
|
|
|
631 default:
|
|
|
632 break;
|
|
|
633 }
|
|
|
634
|
|
|
635 /*
|
|
|
636 * Force it into the LDT in ring 3 for 32-bit processes.
|
|
|
637 * 64-bit processes get the null gdt selector since they
|
|
|
638 * are not allowed to have a private LDT.
|
|
|
639 */
|
|
|
640 #if defined(__amd64)
|
|
|
641 return (datamodel == DATAMODEL_ILP32 ? (sr | SEL_TI_LDT | SEL_UPL) : 0);
|
|
|
642 #elif defined(__i386)
|
|
|
643 return (sr | SEL_TI_LDT | SEL_UPL);
|
|
|
644 #endif
|
|
|
645 }
|
|
|
646
|
|
|
647 /*
|
|
|
648 * Set general registers.
|
|
|
649 */
|
|
|
650 void
|
|
|
651 setgregs(klwp_t *lwp, gregset_t grp)
|
|
|
652 {
|
|
|
653 struct regs *rp = lwptoregs(lwp);
|
|
|
654 model_t datamodel = lwp_getdatamodel(lwp);
|
|
|
655
|
|
|
656 #if defined(__amd64)
|
|
|
657 struct pcb *pcb = &lwp->lwp_pcb;
|
|
|
658 int thisthread = lwptot(lwp) == curthread;
|
|
|
659
|
|
|
660 if (datamodel == DATAMODEL_NATIVE) {
|
|
|
661
|
|
|
662 if (thisthread)
|
|
|
663 (void) save_syscall_args(); /* copy the args */
|
|
|
664
|
|
|
665 rp->r_rdi = grp[REG_RDI];
|
|
|
666 rp->r_rsi = grp[REG_RSI];
|
|
|
667 rp->r_rdx = grp[REG_RDX];
|
|
|
668 rp->r_rcx = grp[REG_RCX];
|
|
|
669 rp->r_r8 = grp[REG_R8];
|
|
|
670 rp->r_r9 = grp[REG_R9];
|
|
|
671 rp->r_rax = grp[REG_RAX];
|
|
|
672 rp->r_rbx = grp[REG_RBX];
|
|
|
673 rp->r_rbp = grp[REG_RBP];
|
|
|
674 rp->r_r10 = grp[REG_R10];
|
|
|
675 rp->r_r11 = grp[REG_R11];
|
|
|
676 rp->r_r12 = grp[REG_R12];
|
|
|
677 rp->r_r13 = grp[REG_R13];
|
|
|
678 rp->r_r14 = grp[REG_R14];
|
|
|
679 rp->r_r15 = grp[REG_R15];
|
|
|
680 rp->r_trapno = grp[REG_TRAPNO];
|
|
|
681 rp->r_err = grp[REG_ERR];
|
|
|
682 rp->r_rip = grp[REG_RIP];
|
|
|
683 /*
|
|
|
684 * Setting %cs or %ss to anything else is quietly but
|
|
|
685 * quite definitely forbidden!
|
|
|
686 */
|
|
|
687 rp->r_cs = UCS_SEL;
|
|
|
688 rp->r_ss = UDS_SEL;
|
|
|
689 rp->r_rsp = grp[REG_RSP];
|
|
|
690
|
|
|
691 if (thisthread)
|
|
|
692 kpreempt_disable();
|
|
|
693
|
|
|
694 pcb->pcb_ds = UDS_SEL;
|
|
|
695 pcb->pcb_es = UDS_SEL;
|
|
|
696
|
|
|
697 /*
|
|
|
698 * 64-bit processes -are- allowed to set their fsbase/gsbase
|
|
|
699 * values directly, but only if they're using the segment
|
|
|
700 * selectors that allow that semantic.
|
|
|
701 *
|
|
|
702 * (32-bit processes must use lwp_set_private().)
|
|
|
703 */
|
|
|
704 pcb->pcb_fsbase = grp[REG_FSBASE];
|
|
|
705 pcb->pcb_gsbase = grp[REG_GSBASE];
|
|
|
706 pcb->pcb_fs = fix_segreg(grp[REG_FS], datamodel);
|
|
|
707 pcb->pcb_gs = fix_segreg(grp[REG_GS], datamodel);
|
|
|
708
|
|
|
709 /*
|
|
|
710 * Ensure that we go out via update_sregs
|
|
|
711 */
|
|
|
712 pcb->pcb_flags |= RUPDATE_PENDING;
|
|
|
713 lwptot(lwp)->t_post_sys = 1;
|
|
|
714 if (thisthread)
|
|
|
715 kpreempt_enable();
|
|
|
716 #if defined(_SYSCALL32_IMPL)
|
|
|
717 } else {
|
|
|
718 rp->r_rdi = (uint32_t)grp[REG_RDI];
|
|
|
719 rp->r_rsi = (uint32_t)grp[REG_RSI];
|
|
|
720 rp->r_rdx = (uint32_t)grp[REG_RDX];
|
|
|
721 rp->r_rcx = (uint32_t)grp[REG_RCX];
|
|
|
722 rp->r_rax = (uint32_t)grp[REG_RAX];
|
|
|
723 rp->r_rbx = (uint32_t)grp[REG_RBX];
|
|
|
724 rp->r_rbp = (uint32_t)grp[REG_RBP];
|
|
|
725 rp->r_trapno = (uint32_t)grp[REG_TRAPNO];
|
|
|
726 rp->r_err = (uint32_t)grp[REG_ERR];
|
|
|
727 rp->r_rip = (uint32_t)grp[REG_RIP];
|
|
|
728
|
|
|
729 /*
|
|
|
730 * The kernel uses %cs to determine if it is dealing with
|
|
|
731 * another part of the kernel or with a userland application.
|
|
|
732 * Specifically, it tests the privilege bits. For this reason,
|
|
|
733 * we must prevent user apps from ending up with a NULL selector
|
|
|
734 * in %cs. Instead, we'll use index 0 into the GDT but with the
|
|
|
735 * privilege bits set to usermode.
|
|
|
736 */
|
|
|
737 rp->r_cs = fix_segreg(grp[REG_CS], datamodel) | SEL_UPL;
|
|
|
738 rp->r_ss = fix_segreg(grp[REG_DS], datamodel);
|
|
|
739
|
|
|
740 rp->r_rsp = (uint32_t)grp[REG_RSP];
|
|
|
741
|
|
|
742 if (thisthread)
|
|
|
743 kpreempt_disable();
|
|
|
744
|
|
|
745 pcb->pcb_ds = fix_segreg(grp[REG_DS], datamodel);
|
|
|
746 pcb->pcb_es = fix_segreg(grp[REG_ES], datamodel);
|
|
|
747
|
|
|
748 /*
|
|
|
749 * (See fsbase/gsbase commentary above)
|
|
|
750 */
|
|
|
751 pcb->pcb_fs = fix_segreg(grp[REG_FS], datamodel);
|
|
|
752 pcb->pcb_gs = fix_segreg(grp[REG_GS], datamodel);
|
|
|
753
|
|
|
754 /*
|
|
|
755 * Ensure that we go out via update_sregs
|
|
|
756 */
|
|
|
757 pcb->pcb_flags |= RUPDATE_PENDING;
|
|
|
758 lwptot(lwp)->t_post_sys = 1;
|
|
|
759 if (thisthread)
|
|
|
760 kpreempt_enable();
|
|
|
761 #endif
|
|
|
762 }
|
|
|
763
|
|
|
764 /*
|
|
|
765 * Only certain bits of the flags register can be modified.
|
|
|
766 */
|
|
|
767 rp->r_rfl = (rp->r_rfl & ~PSL_USERMASK) |
|
|
|
768 (grp[REG_RFL] & PSL_USERMASK);
|
|
|
769
|
|
|
770 #elif defined(__i386)
|
|
|
771
|
|
|
772 /*
|
|
|
773 * Only certain bits of the flags register can be modified.
|
|
|
774 */
|
|
|
775 grp[EFL] = (rp->r_efl & ~PSL_USERMASK) | (grp[EFL] & PSL_USERMASK);
|
|
|
776
|
|
|
777 /*
|
|
|
778 * Copy saved registers from user stack.
|
|
|
779 */
|
|
|
780 bcopy(grp, &rp->r_gs, sizeof (gregset_t));
|
|
|
781
|
|
|
782 rp->r_cs = fix_segreg(rp->r_cs, datamodel);
|
|
|
783 rp->r_ss = fix_segreg(rp->r_ss, datamodel);
|
|
|
784 rp->r_ds = fix_segreg(rp->r_ds, datamodel);
|
|
|
785 rp->r_es = fix_segreg(rp->r_es, datamodel);
|
|
|
786 rp->r_fs = fix_segreg(rp->r_fs, datamodel);
|
|
|
787 rp->r_gs = fix_segreg(rp->r_gs, datamodel);
|
|
|
788
|
|
|
789 #endif /* __i386 */
|
|
|
790 }
|
|
|
791
|
|
|
792 /*
|
|
|
793 * Determine whether eip is likely to have an interrupt frame
|
|
|
794 * on the stack. We do this by comparing the address to the
|
|
|
795 * range of addresses spanned by several well-known routines.
|
|
|
796 */
|
|
|
797 extern void _interrupt();
|
|
|
798 extern void _allsyscalls();
|
|
|
799 extern void _cmntrap();
|
|
|
800 extern void fakesoftint();
|
|
|
801
|
|
|
802 extern size_t _interrupt_size;
|
|
|
803 extern size_t _allsyscalls_size;
|
|
|
804 extern size_t _cmntrap_size;
|
|
|
805 extern size_t _fakesoftint_size;
|
|
|
806
|
|
|
807 /*
|
|
|
808 * Get a pc-only stacktrace. Used for kmem_alloc() buffer ownership tracking.
|
|
|
809 * Returns MIN(current stack depth, pcstack_limit).
|
|
|
810 */
|
|
|
811 int
|
|
|
812 getpcstack(pc_t *pcstack, int pcstack_limit)
|
|
|
813 {
|
|
|
814 struct frame *fp = (struct frame *)getfp();
|
|
|
815 struct frame *nextfp, *minfp, *stacktop;
|
|
|
816 int depth = 0;
|
|
|
817 int on_intr;
|
|
|
818 uintptr_t pc;
|
|
|
819
|
|
|
820 if ((on_intr = CPU_ON_INTR(CPU)) != 0)
|
|
|
821 stacktop = (struct frame *)(CPU->cpu_intr_stack + SA(MINFRAME));
|
|
|
822 else
|
|
|
823 stacktop = (struct frame *)curthread->t_stk;
|
|
|
824 minfp = fp;
|
|
|
825
|
|
|
826 pc = ((struct regs *)fp)->r_pc;
|
|
|
827
|
|
|
828 while (depth < pcstack_limit) {
|
|
|
829 nextfp = (struct frame *)fp->fr_savfp;
|
|
|
830 pc = fp->fr_savpc;
|
|
|
831 if (nextfp <= minfp || nextfp >= stacktop) {
|
|
|
832 if (on_intr) {
|
|
|
833 /*
|
|
|
834 * Hop from interrupt stack to thread stack.
|
|
|
835 */
|
|
|
836 stacktop = (struct frame *)curthread->t_stk;
|
|
|
837 minfp = (struct frame *)curthread->t_stkbase;
|
|
|
838 on_intr = 0;
|
|
|
839 continue;
|
|
|
840 }
|
|
|
841 break;
|
|
|
842 }
|
|
|
843 pcstack[depth++] = (pc_t)pc;
|
|
|
844 fp = nextfp;
|
|
|
845 minfp = fp;
|
|
|
846 }
|
|
|
847 return (depth);
|
|
|
848 }
|
|
|
849
|
|
|
850 /*
|
|
|
851 * The following ELF header fields are defined as processor-specific
|
|
|
852 * in the V8 ABI:
|
|
|
853 *
|
|
|
854 * e_ident[EI_DATA] encoding of the processor-specific
|
|
|
855 * data in the object file
|
|
|
856 * e_machine processor identification
|
|
|
857 * e_flags processor-specific flags associated
|
|
|
858 * with the file
|
|
|
859 */
|
|
|
860
|
|
|
861 /*
|
|
|
862 * The value of at_flags reflects a platform's cpu module support.
|
|
|
863 * at_flags is used to check for allowing a binary to execute and
|
|
|
864 * is passed as the value of the AT_FLAGS auxiliary vector.
|
|
|
865 */
|
|
|
866 int at_flags = 0;
|
|
|
867
|
|
|
868 /*
|
|
|
869 * Check the processor-specific fields of an ELF header.
|
|
|
870 *
|
|
|
871 * returns 1 if the fields are valid, 0 otherwise
|
|
|
872 */
|
|
|
873 /*ARGSUSED2*/
|
|
|
874 int
|
|
|
875 elfheadcheck(
|
|
|
876 unsigned char e_data,
|
|
|
877 Elf32_Half e_machine,
|
|
|
878 Elf32_Word e_flags)
|
|
|
879 {
|
|
|
880 if (e_data != ELFDATA2LSB)
|
|
|
881 return (0);
|
|
|
882 #if defined(__amd64)
|
|
|
883 if (e_machine == EM_AMD64)
|
|
|
884 return (1);
|
|
|
885 #endif
|
|
|
886 return (e_machine == EM_386);
|
|
|
887 }
|
|
|
888
|
|
|
889 uint_t auxv_hwcap_include = 0; /* patch to enable unrecognized features */
|
|
|
890 uint_t auxv_hwcap_exclude = 0; /* patch for broken cpus, debugging */
|
|
|
891 #if defined(_SYSCALL32_IMPL)
|
|
|
892 uint_t auxv_hwcap32_include = 0; /* ditto for 32-bit apps */
|
|
|
893 uint_t auxv_hwcap32_exclude = 0; /* ditto for 32-bit apps */
|
|
|
894 #endif
|
|
|
895
|
|
|
896 /*
|
|
|
897 * Gather information about the processor and place it into auxv_hwcap
|
|
|
898 * so that it can be exported to the linker via the aux vector.
|
|
|
899 *
|
|
|
900 * We use this seemingly complicated mechanism so that we can ensure
|
|
|
901 * that /etc/system can be used to override what the system can or
|
|
|
902 * cannot discover for itself.
|
|
|
903 */
|
|
|
904 void
|
|
|
905 bind_hwcap(void)
|
|
|
906 {
|
|
|
907 uint_t cpu_hwcap_flags = cpuid_pass4(NULL);
|
|
|
908
|
|
|
909 auxv_hwcap = (auxv_hwcap_include | cpu_hwcap_flags) &
|
|
|
910 ~auxv_hwcap_exclude;
|
|
|
911
|
|
|
912 #if defined(__amd64)
|
|
|
913 /*
|
|
|
914 * On AMD processors, sysenter just doesn't work at all
|
|
|
915 * when the kernel is in long mode. On IA-32e processors
|
|
|
916 * it does, but there's no real point in all the alternate
|
|
|
917 * mechanism when syscall works on both.
|
|
|
918 *
|
|
|
919 * Besides, the kernel's sysenter handler is expecting a
|
|
|
920 * 32-bit lwp ...
|
|
|
921 */
|
|
|
922 auxv_hwcap &= ~AV_386_SEP;
|
|
|
923 #endif
|
|
|
924
|
|
|
925 if (auxv_hwcap_include || auxv_hwcap_exclude)
|
|
|
926 cmn_err(CE_CONT, "?user ABI extensions: %b\n",
|
|
|
927 auxv_hwcap, FMT_AV_386);
|
|
|
928
|
|
|
929 #if defined(_SYSCALL32_IMPL)
|
|
|
930 auxv_hwcap32 = (auxv_hwcap32_include | cpu_hwcap_flags) &
|
|
|
931 ~auxv_hwcap32_exclude;
|
|
|
932
|
|
|
933 #if defined(__amd64)
|
|
|
934 /*
|
|
|
935 * If this is an amd64 architecture machine from Intel, then
|
|
|
936 * syscall -doesn't- work in compatibility mode, only sysenter does.
|
|
|
937 *
|
|
|
938 * Sigh.
|
|
|
939 */
|
|
|
940 if (!cpuid_syscall32_insn(NULL))
|
|
|
941 auxv_hwcap32 &= ~AV_386_AMD_SYSC;
|
|
|
942 #endif
|
|
|
943
|
|
|
944 if (auxv_hwcap32_include || auxv_hwcap32_exclude)
|
|
|
945 cmn_err(CE_CONT, "?32-bit user ABI extensions: %b\n",
|
|
|
946 auxv_hwcap32, FMT_AV_386);
|
|
|
947 #endif
|
|
|
948 }
|
|
|
949
|
|
|
950 /*
|
|
|
951 * sync_icache() - this is called
|
|
|
952 * in proc/fs/prusrio.c. x86 has an unified cache and therefore
|
|
|
953 * this is a nop.
|
|
|
954 */
|
|
|
955 /* ARGSUSED */
|
|
|
956 void
|
|
|
957 sync_icache(caddr_t addr, uint_t len)
|
|
|
958 {
|
|
|
959 /* Do nothing for now */
|
|
|
960 }
|
|
|
961
|
|
|
962 /*ARGSUSED*/
|
|
|
963 void
|
|
|
964 sync_data_memory(caddr_t va, size_t len)
|
|
|
965 {
|
|
|
966 /* Not implemented for this platform */
|
|
|
967 }
|
|
|
968
|
|
|
969 int
|
|
|
970 __ipltospl(int ipl)
|
|
|
971 {
|
|
|
972 return (ipltospl(ipl));
|
|
|
973 }
|
|
|
974
|
|
|
975 /*
|
|
|
976 * The panic code invokes panic_saveregs() to record the contents of a
|
|
|
977 * regs structure into the specified panic_data structure for debuggers.
|
|
|
978 */
|
|
|
979 void
|
|
|
980 panic_saveregs(panic_data_t *pdp, struct regs *rp)
|
|
|
981 {
|
|
|
982 panic_nv_t *pnv = PANICNVGET(pdp);
|
|
|
983
|
|
|
984 struct cregs creg;
|
|
|
985
|
|
|
986 getcregs(&creg);
|
|
|
987
|
|
|
988 #if defined(__amd64)
|
|
|
989 PANICNVADD(pnv, "rdi", rp->r_rdi);
|
|
|
990 PANICNVADD(pnv, "rsi", rp->r_rsi);
|
|
|
991 PANICNVADD(pnv, "rdx", rp->r_rdx);
|
|
|
992 PANICNVADD(pnv, "rcx", rp->r_rcx);
|
|
|
993 PANICNVADD(pnv, "r8", rp->r_r8);
|
|
|
994 PANICNVADD(pnv, "r9", rp->r_r9);
|
|
|
995 PANICNVADD(pnv, "rax", rp->r_rax);
|
|
|
996 PANICNVADD(pnv, "rbx", rp->r_rbx);
|
|
|
997 PANICNVADD(pnv, "rbp", rp->r_rbp);
|
|
|
998 PANICNVADD(pnv, "r10", rp->r_r10);
|
|
|
999 PANICNVADD(pnv, "r10", rp->r_r10);
|
|
|
1000 PANICNVADD(pnv, "r11", rp->r_r11);
|
|
|
1001 PANICNVADD(pnv, "r12", rp->r_r12);
|
|
|
1002 PANICNVADD(pnv, "r13", rp->r_r13);
|
|
|
1003 PANICNVADD(pnv, "r14", rp->r_r14);
|
|
|
1004 PANICNVADD(pnv, "r15", rp->r_r15);
|
|
|
1005 PANICNVADD(pnv, "fsbase", rp->r_fsbase);
|
|
|
1006 PANICNVADD(pnv, "gsbase", rp->r_gsbase);
|
|
|
1007 PANICNVADD(pnv, "ds", rp->r_ds);
|
|
|
1008 PANICNVADD(pnv, "es", rp->r_es);
|
|
|
1009 PANICNVADD(pnv, "fs", rp->r_fs);
|
|
|
1010 PANICNVADD(pnv, "gs", rp->r_gs);
|
|
|
1011 PANICNVADD(pnv, "trapno", rp->r_trapno);
|
|
|
1012 PANICNVADD(pnv, "err", rp->r_err);
|
|
|
1013 PANICNVADD(pnv, "rip", rp->r_rip);
|
|
|
1014 PANICNVADD(pnv, "cs", rp->r_cs);
|
|
|
1015 PANICNVADD(pnv, "rflags", rp->r_rfl);
|
|
|
1016 PANICNVADD(pnv, "rsp", rp->r_rsp);
|
|
|
1017 PANICNVADD(pnv, "ss", rp->r_ss);
|
|
|
1018 PANICNVADD(pnv, "gdt_hi", (uint64_t)(creg.cr_gdt._l[3]));
|
|
|
1019 PANICNVADD(pnv, "gdt_lo", (uint64_t)(creg.cr_gdt._l[0]));
|
|
|
1020 PANICNVADD(pnv, "idt_hi", (uint64_t)(creg.cr_idt._l[3]));
|
|
|
1021 PANICNVADD(pnv, "idt_lo", (uint64_t)(creg.cr_idt._l[0]));
|
|
|
1022 #elif defined(__i386)
|
|
|
1023 PANICNVADD(pnv, "gs", (uint32_t)rp->r_gs);
|
|
|
1024 PANICNVADD(pnv, "fs", (uint32_t)rp->r_fs);
|
|
|
1025 PANICNVADD(pnv, "es", (uint32_t)rp->r_es);
|
|
|
1026 PANICNVADD(pnv, "ds", (uint32_t)rp->r_ds);
|
|
|
1027 PANICNVADD(pnv, "edi", (uint32_t)rp->r_edi);
|
|
|
1028 PANICNVADD(pnv, "esi", (uint32_t)rp->r_esi);
|
|
|
1029 PANICNVADD(pnv, "ebp", (uint32_t)rp->r_ebp);
|
|
|
1030 PANICNVADD(pnv, "esp", (uint32_t)rp->r_esp);
|
|
|
1031 PANICNVADD(pnv, "ebx", (uint32_t)rp->r_ebx);
|
|
|
1032 PANICNVADD(pnv, "edx", (uint32_t)rp->r_edx);
|
|
|
1033 PANICNVADD(pnv, "ecx", (uint32_t)rp->r_ecx);
|
|
|
1034 PANICNVADD(pnv, "eax", (uint32_t)rp->r_eax);
|
|
|
1035 PANICNVADD(pnv, "trapno", (uint32_t)rp->r_trapno);
|
|
|
1036 PANICNVADD(pnv, "err", (uint32_t)rp->r_err);
|
|
|
1037 PANICNVADD(pnv, "eip", (uint32_t)rp->r_eip);
|
|
|
1038 PANICNVADD(pnv, "cs", (uint32_t)rp->r_cs);
|
|
|
1039 PANICNVADD(pnv, "eflags", (uint32_t)rp->r_efl);
|
|
|
1040 PANICNVADD(pnv, "uesp", (uint32_t)rp->r_uesp);
|
|
|
1041 PANICNVADD(pnv, "ss", (uint32_t)rp->r_ss);
|
|
|
1042 PANICNVADD(pnv, "gdt", creg.cr_gdt);
|
|
|
1043 PANICNVADD(pnv, "idt", creg.cr_idt);
|
|
|
1044 #endif /* __i386 */
|
|
|
1045
|
|
|
1046 PANICNVADD(pnv, "ldt", creg.cr_ldt);
|
|
|
1047 PANICNVADD(pnv, "task", creg.cr_task);
|
|
|
1048 PANICNVADD(pnv, "cr0", creg.cr_cr0);
|
|
|
1049 PANICNVADD(pnv, "cr2", creg.cr_cr2);
|
|
|
1050 PANICNVADD(pnv, "cr3", creg.cr_cr3);
|
|
|
1051 if (creg.cr_cr4)
|
|
|
1052 PANICNVADD(pnv, "cr4", creg.cr_cr4);
|
|
|
1053
|
|
|
1054 PANICNVSET(pdp, pnv);
|
|
|
1055 }
|
|
|
1056
|
|
|
1057 #define TR_ARG_MAX 6 /* Max args to print, same as SPARC */
|
|
|
1058
|
|
|
1059 #if !defined(__amd64)
|
|
|
1060
|
|
|
1061 /*
|
|
|
1062 * Given a return address (%eip), determine the likely number of arguments
|
|
|
1063 * that were pushed on the stack prior to its execution. We do this by
|
|
|
1064 * expecting that a typical call sequence consists of pushing arguments on
|
|
|
1065 * the stack, executing a call instruction, and then performing an add
|
|
|
1066 * on %esp to restore it to the value prior to pushing the arguments for
|
|
|
1067 * the call. We attempt to detect such an add, and divide the addend
|
|
|
1068 * by the size of a word to determine the number of pushed arguments.
|
|
|
1069 *
|
|
|
1070 * If we do not find such an add, we punt and return TR_ARG_MAX. It is not
|
|
|
1071 * possible to reliably determine if a function took no arguments (i.e. was
|
|
|
1072 * void) because assembler routines do not reliably perform an add on %esp
|
|
|
1073 * immediately upon returning (eg. _sys_call()), so returning TR_ARG_MAX is
|
|
|
1074 * safer than returning 0.
|
|
|
1075 */
|
|
|
1076 static ulong_t
|
|
|
1077 argcount(uintptr_t eip)
|
|
|
1078 {
|
|
|
1079 const uint8_t *ins = (const uint8_t *)eip;
|
|
|
1080 ulong_t n;
|
|
|
1081
|
|
|
1082 enum {
|
|
|
1083 M_MODRM_ESP = 0xc4, /* Mod/RM byte indicates %esp */
|
|
|
1084 M_ADD_IMM32 = 0x81, /* ADD imm32 to r/m32 */
|
|
|
1085 M_ADD_IMM8 = 0x83 /* ADD imm8 to r/m32 */
|
|
|
1086 };
|
|
|
1087
|
|
|
1088 if (eip < KERNELBASE || ins[1] != M_MODRM_ESP)
|
|
|
1089 return (TR_ARG_MAX);
|
|
|
1090
|
|
|
1091 switch (ins[0]) {
|
|
|
1092 case M_ADD_IMM32:
|
|
|
1093 n = ins[2] + (ins[3] << 8) + (ins[4] << 16) + (ins[5] << 24);
|
|
|
1094 break;
|
|
|
1095
|
|
|
1096 case M_ADD_IMM8:
|
|
|
1097 n = ins[2];
|
|
|
1098 break;
|
|
|
1099
|
|
|
1100 default:
|
|
|
1101 return (TR_ARG_MAX);
|
|
|
1102 }
|
|
|
1103
|
|
|
1104 n /= sizeof (long);
|
|
|
1105 return (MIN(n, TR_ARG_MAX));
|
|
|
1106 }
|
|
|
1107
|
|
|
1108 #endif /* !__amd64 */
|
|
|
1109
|
|
|
1110 /*
|
|
|
1111 * Print a stack backtrace using the specified frame pointer. We delay two
|
|
|
1112 * seconds before continuing, unless this is the panic traceback. Note
|
|
|
1113 * that the frame for the starting stack pointer value is omitted because
|
|
|
1114 * the corresponding %eip is not known.
|
|
|
1115 */
|
|
|
1116 #if defined(__amd64)
|
|
|
1117
|
|
|
1118 void
|
|
|
1119 traceback(caddr_t fpreg)
|
|
|
1120 {
|
|
|
1121 struct frame *fp = (struct frame *)fpreg;
|
|
|
1122 struct frame *nextfp;
|
|
|
1123 uintptr_t pc, nextpc;
|
|
|
1124 ulong_t off;
|
|
|
1125 char args[TR_ARG_MAX * 2 + 16], *sym;
|
|
|
1126
|
|
|
1127 if (!panicstr)
|
|
|
1128 printf("traceback: %%fp = %p\n", (void *)fp);
|
|
|
1129
|
|
|
1130 if ((uintptr_t)fp < KERNELBASE)
|
|
|
1131 goto out;
|
|
|
1132
|
|
|
1133 pc = fp->fr_savpc;
|
|
|
1134 fp = (struct frame *)fp->fr_savfp;
|
|
|
1135
|
|
|
1136 while ((uintptr_t)fp >= KERNELBASE) {
|
|
|
1137 /*
|
|
|
1138 * XX64 Until port is complete tolerate 8-byte aligned
|
|
|
1139 * frame pointers but flag with a warning so they can
|
|
|
1140 * be fixed.
|
|
|
1141 */
|
|
|
1142 if (((uintptr_t)fp & (STACK_ALIGN - 1)) != 0) {
|
|
|
1143 if (((uintptr_t)fp & (8 - 1)) == 0) {
|
|
|
1144 printf(" >> warning! 8-byte"
|
|
|
1145 " aligned %%fp = %p\n", (void *)fp);
|
|
|
1146 } else {
|
|
|
1147 printf(
|
|
|
1148 " >> mis-aligned %%fp = %p\n", (void *)fp);
|
|
|
1149 break;
|
|
|
1150 }
|
|
|
1151 }
|
|
|
1152
|
|
|
1153 args[0] = '\0';
|
|
|
1154 nextpc = (uintptr_t)fp->fr_savpc;
|
|
|
1155 nextfp = (struct frame *)fp->fr_savfp;
|
|
|
1156 if ((sym = kobj_getsymname(pc, &off)) != NULL) {
|
|
|
1157 printf("%016lx %s:%s+%lx (%s)\n", (uintptr_t)fp,
|
|
|
1158 mod_containing_pc((caddr_t)pc), sym, off, args);
|
|
|
1159 } else {
|
|
|
1160 printf("%016lx %lx (%s)\n",
|
|
|
1161 (uintptr_t)fp, pc, args);
|
|
|
1162 }
|
|
|
1163
|
|
|
1164 pc = nextpc;
|
|
|
1165 fp = nextfp;
|
|
|
1166 }
|
|
|
1167 out:
|
|
|
1168 if (!panicstr) {
|
|
|
1169 printf("end of traceback\n");
|
|
|
1170 DELAY(2 * MICROSEC);
|
|
|
1171 }
|
|
|
1172 }
|
|
|
1173
|
|
|
1174 #elif defined(__i386)
|
|
|
1175
|
|
|
1176 void
|
|
|
1177 traceback(caddr_t fpreg)
|
|
|
1178 {
|
|
|
1179 struct frame *fp = (struct frame *)fpreg;
|
|
|
1180 struct frame *nextfp, *minfp, *stacktop;
|
|
|
1181 uintptr_t pc, nextpc;
|
|
|
1182
|
|
|
1183 cpu_t *cpu;
|
|
|
1184
|
|
|
1185 /*
|
|
|
1186 * args[] holds TR_ARG_MAX hex long args, plus ", " or '\0'.
|
|
|
1187 */
|
|
|
1188 char args[TR_ARG_MAX * 2 + 8], *p;
|
|
|
1189
|
|
|
1190 int on_intr;
|
|
|
1191 ulong_t off;
|
|
|
1192 char *sym;
|
|
|
1193
|
|
|
1194 if (!panicstr)
|
|
|
1195 printf("traceback: %%fp = %p\n", (void *)fp);
|
|
|
1196
|
|
|
1197 /*
|
|
|
1198 * If we are panicking, all high-level interrupt information in
|
|
|
1199 * CPU was overwritten. panic_cpu has the correct values.
|
|
|
1200 */
|
|
|
1201 kpreempt_disable(); /* prevent migration */
|
|
|
1202
|
|
|
1203 cpu = (panicstr && CPU->cpu_id == panic_cpu.cpu_id)? &panic_cpu : CPU;
|
|
|
1204
|
|
|
1205 if ((on_intr = CPU_ON_INTR(cpu)) != 0)
|
|
|
1206 stacktop = (struct frame *)(cpu->cpu_intr_stack + SA(MINFRAME));
|
|
|
1207 else
|
|
|
1208 stacktop = (struct frame *)curthread->t_stk;
|
|
|
1209
|
|
|
1210 kpreempt_enable();
|
|
|
1211
|
|
|
1212 if ((uintptr_t)fp < KERNELBASE)
|
|
|
1213 goto out;
|
|
|
1214
|
|
|
1215 minfp = fp; /* Baseline minimum frame pointer */
|
|
|
1216 pc = fp->fr_savpc;
|
|
|
1217 fp = (struct frame *)fp->fr_savfp;
|
|
|
1218
|
|
|
1219 while ((uintptr_t)fp >= KERNELBASE) {
|
|
|
1220 ulong_t argc;
|
|
|
1221 long *argv;
|
|
|
1222
|
|
|
1223 if (fp <= minfp || fp >= stacktop) {
|
|
|
1224 if (on_intr) {
|
|
|
1225 /*
|
|
|
1226 * Hop from interrupt stack to thread stack.
|
|
|
1227 */
|
|
|
1228 stacktop = (struct frame *)curthread->t_stk;
|
|
|
1229 minfp = (struct frame *)curthread->t_stkbase;
|
|
|
1230 on_intr = 0;
|
|
|
1231 continue;
|
|
|
1232 }
|
|
|
1233 break; /* we're outside of the expected range */
|
|
|
1234 }
|
|
|
1235
|
|
|
1236 if ((uintptr_t)fp & (STACK_ALIGN - 1)) {
|
|
|
1237 printf(" >> mis-aligned %%fp = %p\n", (void *)fp);
|
|
|
1238 break;
|
|
|
1239 }
|
|
|
1240
|
|
|
1241 nextpc = fp->fr_savpc;
|
|
|
1242 nextfp = (struct frame *)fp->fr_savfp;
|
|
|
1243 argc = argcount(nextpc);
|
|
|
1244 argv = (long *)((char *)fp + sizeof (struct frame));
|
|
|
1245
|
|
|
1246 args[0] = '\0';
|
|
|
1247 p = args;
|
|
|
1248 while (argc-- > 0 && argv < (long *)stacktop) {
|
|
|
1249 p += snprintf(p, args + sizeof (args) - p,
|
|
|
1250 "%s%lx", (p == args) ? "" : ", ", *argv++);
|
|
|
1251 }
|
|
|
1252
|
|
|
1253 if ((sym = kobj_getsymname(pc, &off)) != NULL) {
|
|
|
1254 printf("%08lx %s:%s+%lx (%s)\n", (uintptr_t)fp,
|
|
|
1255 mod_containing_pc((caddr_t)pc), sym, off, args);
|
|
|
1256 } else {
|
|
|
1257 printf("%08lx %lx (%s)\n",
|
|
|
1258 (uintptr_t)fp, pc, args);
|
|
|
1259 }
|
|
|
1260
|
|
|
1261 minfp = fp;
|
|
|
1262 pc = nextpc;
|
|
|
1263 fp = nextfp;
|
|
|
1264 }
|
|
|
1265 out:
|
|
|
1266 if (!panicstr) {
|
|
|
1267 printf("end of traceback\n");
|
|
|
1268 DELAY(2 * MICROSEC);
|
|
|
1269 }
|
|
|
1270 }
|
|
|
1271
|
|
|
1272 #endif /* __i386 */
|
|
|
1273
|
|
|
1274 /*
|
|
|
1275 * Generate a stack backtrace from a saved register set.
|
|
|
1276 */
|
|
|
1277 void
|
|
|
1278 traceregs(struct regs *rp)
|
|
|
1279 {
|
|
|
1280 traceback((caddr_t)rp->r_fp);
|
|
|
1281 }
|
|
|
1282
|
|
|
1283 void
|
|
|
1284 exec_set_sp(size_t stksize)
|
|
|
1285 {
|
|
|
1286 klwp_t *lwp = ttolwp(curthread);
|
|
|
1287
|
|
|
1288 lwptoregs(lwp)->r_sp = (uintptr_t)curproc->p_usrstack - stksize;
|
|
|
1289 }
|
|
|
1290
|
|
|
1291 hrtime_t
|
|
|
1292 gethrtime_waitfree(void)
|
|
|
1293 {
|
|
|
1294 return (dtrace_gethrtime());
|
|
|
1295 }
|
|
|
1296
|
|
|
1297 hrtime_t
|
|
|
1298 gethrtime(void)
|
|
|
1299 {
|
|
|
1300 return (gethrtimef());
|
|
|
1301 }
|
|
|
1302
|
|
|
1303 hrtime_t
|
|
|
1304 gethrtime_unscaled(void)
|
|
|
1305 {
|
|
|
1306 return (gethrtimeunscaledf());
|
|
|
1307 }
|
|
|
1308
|
|
|
1309 void
|
|
|
1310 scalehrtime(hrtime_t *hrt)
|
|
|
1311 {
|
|
|
1312 scalehrtimef(hrt);
|
|
|
1313 }
|
|
|
1314
|
|
|
1315 void
|
|
|
1316 gethrestime(timespec_t *tp)
|
|
|
1317 {
|
|
|
1318 gethrestimef(tp);
|
|
|
1319 }
|
|
|
1320
|
|
|
1321 #if defined(__amd64)
|
|
|
1322 /*
|
|
|
1323 * Part of the implementation of hres_tick(); this routine is
|
|
|
1324 * easier in C than assembler .. called with the hres_lock held.
|
|
|
1325 *
|
|
|
1326 * XX64 Many of these timekeeping variables need to be extern'ed in a header
|
|
|
1327 */
|
|
|
1328
|
|
|
1329 #include <sys/time.h>
|
|
|
1330 #include <sys/machlock.h>
|
|
|
1331
|
|
|
1332 extern int one_sec;
|
|
|
1333 extern timestruc_t hrestime;
|
|
|
1334 extern int max_hres_adj;
|
|
|
1335
|
|
|
1336 void
|
|
|
1337 __adj_hrestime(void)
|
|
|
1338 {
|
|
|
1339 long long adj;
|
|
|
1340
|
|
|
1341 if (hrestime_adj == 0)
|
|
|
1342 adj = 0;
|
|
|
1343 else if (hrestime_adj > 0) {
|
|
|
1344 if (hrestime_adj < max_hres_adj)
|
|
|
1345 adj = hrestime_adj;
|
|
|
1346 else
|
|
|
1347 adj = max_hres_adj;
|
|
|
1348 } else {
|
|
|
1349 if (hrestime_adj < -max_hres_adj)
|
|
|
1350 adj = -max_hres_adj;
|
|
|
1351 else
|
|
|
1352 adj = hrestime_adj;
|
|
|
1353 }
|
|
|
1354
|
|
|
1355 timedelta -= adj;
|
|
|
1356 hrestime_adj = timedelta;
|
|
|
1357 hrestime.tv_nsec += adj;
|
|
|
1358
|
|
|
1359 while (hrestime.tv_nsec >= NANOSEC) {
|
|
|
1360 one_sec++;
|
|
|
1361 hrestime.tv_sec++;
|
|
|
1362 hrestime.tv_nsec -= NANOSEC;
|
|
|
1363 }
|
|
|
1364 }
|
|
|
1365 #endif
|
|
|
1366
|
|
|
1367 /*
|
|
|
1368 * Wrapper functions to maintain backwards compability
|
|
|
1369 */
|
|
|
1370 int
|
|
|
1371 xcopyin(const void *uaddr, void *kaddr, size_t count)
|
|
|
1372 {
|
|
|
1373 return (xcopyin_nta(uaddr, kaddr, count, UIO_COPY_CACHED));
|
|
|
1374 }
|
|
|
1375
|
|
|
1376 int
|
|
|
1377 xcopyout(const void *kaddr, void *uaddr, size_t count)
|
|
|
1378 {
|
|
|
1379 return (xcopyout_nta(kaddr, uaddr, count, UIO_COPY_CACHED));
|
|
|
1380 }
|
